mirror of https://github.com/m-labs/artiq.git
parent
dceb5ae501
commit
e4fff390a8
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@ -25,7 +25,7 @@ class ADPLLProgrammer(Module):
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self.sda_oe.attr.add("no_retiming")
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self.sda_oe.attr.add("no_retiming")
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class Si590(Module, AutoCSR):
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class Si549(Module, AutoCSR):
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def __init__(self, pads):
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def __init__(self, pads):
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self.gpio_enable = CSRStorage(reset=1)
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self.gpio_enable = CSRStorage(reset=1)
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self.gpio_in = CSRStatus(2)
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self.gpio_in = CSRStatus(2)
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