From e41f49cc75c4267ef244603237ce5b95b53c9a50 Mon Sep 17 00:00:00 2001 From: Robert Jordens Date: Fri, 16 Feb 2018 17:23:15 +0000 Subject: [PATCH] kasli: opticlock 125 MHz, mark external reference case broken --- artiq/firmware/runtime/main.rs | 21 +++++++++++++++++---- artiq/gateware/targets/kasli.py | 2 +- 2 files changed, 18 insertions(+), 5 deletions(-) diff --git a/artiq/firmware/runtime/main.rs b/artiq/firmware/runtime/main.rs index 4e4011e40..364f801e9 100644 --- a/artiq/firmware/runtime/main.rs +++ b/artiq/firmware/runtime/main.rs @@ -110,18 +110,31 @@ fn startup() { #[cfg(si5324_free_running)] fn setup_si5324_free_running() { - // 125MHz output, from 10MHz CLKIN2 reference + // 125MHz output, from 100MHz CLKIN2 reference, 9 Hz + // FIXME: needs !FREE_RUN at address 0x00 #[cfg(all(rtio_frequency = "125.0", si5324_ext_ref))] const SI5324_SETTINGS: board_artiq::si5324::FrequencySettings = board_artiq::si5324::FrequencySettings { n1_hs : 10, nc1_ls : 4, n2_hs : 10, - n2_ls : 300, - n31 : 75, - n32 : 6, + n2_ls : 260, + n31 : 65, + n32 : 52, bwsel : 10 }; + // 125MHz output, from crystal, 7 Hz + #[cfg(all(rtio_frequency = "125.0", not(si5324_ext_ref)))] + const SI5324_SETTINGS: board_artiq::si5324::FrequencySettings + = board_artiq::si5324::FrequencySettings { + n1_hs : 10, + nc1_ls : 4, + n2_hs : 10, + n2_ls : 19972, + n31 : 4993, + n32 : 4565, + bwsel : 4 + }; // 150MHz output, from crystal #[cfg(all(rtio_frequency = "150.0", not(si5324_ext_ref)))] const SI5324_SETTINGS: board_artiq::si5324::FrequencySettings diff --git a/artiq/gateware/targets/kasli.py b/artiq/gateware/targets/kasli.py index 72b147064..2fd9058ae 100755 --- a/artiq/gateware/targets/kasli.py +++ b/artiq/gateware/targets/kasli.py @@ -230,7 +230,7 @@ class Opticlock(_StandaloneBase): _StandaloneBase.__init__(self, **kwargs) self.config["SI5324_FREE_RUNNING"] = None - self.config["SI5324_EXT_REF"] = None + # self.config["SI5324_EXT_REF"] = None self.config["RTIO_FREQUENCY"] = "125.0" platform = self.platform