mirror of https://github.com/m-labs/artiq.git
firmware: migrate mgmt_proto to new libio.
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parent
0c1caf0744
commit
e292c8ab65
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@ -154,12 +154,12 @@ impl<T: AsRef<[u8]>> Read for Cursor<T> {
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}
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}
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}
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}
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impl<T: AsMut<[u8]>> Write for Cursor<T> {
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impl<'a> Write for Cursor<&'a mut [u8]> {
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type WriteError = !;
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type WriteError = !;
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type FlushError = !;
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type FlushError = !;
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fn write(&mut self, buf: &[u8]) -> result::Result<usize, Self::WriteError> {
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fn write(&mut self, buf: &[u8]) -> result::Result<usize, Self::WriteError> {
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let data = &mut self.inner.as_mut()[self.pos..];
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let data = &mut self.inner[self.pos..];
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let len = buf.len().min(data.len());
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let len = buf.len().min(data.len());
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data[..len].copy_from_slice(&buf[..len]);
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data[..len].copy_from_slice(&buf[..len]);
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self.pos += len;
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self.pos += len;
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@ -173,7 +173,7 @@ impl<T: AsMut<[u8]>> Write for Cursor<T> {
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}
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}
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#[cfg(feature = "alloc")]
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#[cfg(feature = "alloc")]
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impl<T: ::alloc::Vec<[u8]>> Write for Cursor<T> {
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impl Write for Cursor<::alloc::Vec<u8>> {
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type WriteError = !;
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type WriteError = !;
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type FlushError = !;
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type FlushError = !;
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@ -11,6 +11,6 @@ path = "lib.rs"
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byteorder = { version = "1.0", default-features = false }
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byteorder = { version = "1.0", default-features = false }
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cslice = { version = "0.3" }
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cslice = { version = "0.3" }
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log = { version = "0.4", default-features = false, optional = true }
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log = { version = "0.4", default-features = false, optional = true }
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io = { path = "../libio", features = ["byteorder"] }
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io = { path = "../libio", features = ["byteorder", "alloc"] }
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std_artiq = { path = "../libstd_artiq", features = ["alloc"] }
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std_artiq = { path = "../libstd_artiq", features = ["alloc"] }
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dyld = { path = "../libdyld" }
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dyld = { path = "../libdyld" }
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@ -1,5 +1,7 @@
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#![no_std]
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#![no_std]
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#![feature(alloc)]
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extern crate alloc;
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extern crate byteorder;
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extern crate byteorder;
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extern crate cslice;
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extern crate cslice;
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#[cfg(feature = "log")]
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#[cfg(feature = "log")]
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@ -1,9 +1,10 @@
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use std::vec::Vec;
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use alloc::vec::Vec;
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use std::io::{self, Read, Write};
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use {ReadExt, WriteExt};
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#[cfg(feature = "log")]
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#[cfg(feature = "log")]
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use log;
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use log;
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use io::{Read, Write, Error, Result};
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use io::proto::{ProtoRead, ProtoWrite};
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#[derive(Debug)]
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#[derive(Debug)]
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pub enum Request {
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pub enum Request {
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GetLog,
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GetLog,
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@ -40,9 +41,10 @@ pub enum Reply<'a> {
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}
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}
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impl Request {
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impl Request {
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pub fn read_from(reader: &mut Read) -> io::Result<Request> {
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pub fn read_from<T: Read>(reader: &mut T) -> Result<Request, T::ReadError> {
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#[cfg(feature = "log")]
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#[cfg(feature = "log")]
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fn read_log_level_filter(reader: &mut Read) -> io::Result<log::LevelFilter> {
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fn read_log_level_filter<T: Read>(reader: &mut T) ->
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Result<log::LevelFilter, T::ReadError> {
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Ok(match reader.read_u8()? {
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Ok(match reader.read_u8()? {
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0 => log::LevelFilter::Off,
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0 => log::LevelFilter::Off,
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1 => log::LevelFilter::Error,
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1 => log::LevelFilter::Error,
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@ -50,8 +52,7 @@ impl Request {
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3 => log::LevelFilter::Info,
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3 => log::LevelFilter::Info,
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4 => log::LevelFilter::Debug,
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4 => log::LevelFilter::Debug,
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5 => log::LevelFilter::Trace,
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5 => log::LevelFilter::Trace,
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_ => return Err(io::Error::new(io::ErrorKind::InvalidData,
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_ => return Err(Error::Unrecognized)
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"invalid log level"))
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})
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})
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}
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}
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@ -73,13 +74,13 @@ impl Request {
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4 => Request::Hotswap(reader.read_bytes()?),
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4 => Request::Hotswap(reader.read_bytes()?),
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5 => Request::Reboot,
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5 => Request::Reboot,
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8 => Request::DebugAllocator,
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8 => Request::DebugAllocator,
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_ => return Err(io::Error::new(io::ErrorKind::InvalidData, "unknown request type"))
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_ => return Err(Error::Unrecognized)
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})
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})
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}
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}
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}
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}
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impl<'a> Reply<'a> {
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impl<'a> Reply<'a> {
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pub fn write_to(&self, writer: &mut Write) -> io::Result<()> {
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pub fn write_to<T: Write>(&self, writer: &mut T) -> Result<(), T::WriteError> {
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match *self {
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match *self {
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Reply::Success => {
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Reply::Success => {
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writer.write_u8(1)?;
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writer.write_u8(1)?;
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