From e0687b77f53ae72b4e39bacc41e7bab75eb9813c Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Robert=20J=C3=B6rdens?= Date: Fri, 22 Nov 2019 14:02:13 +0000 Subject: [PATCH] si5324: 10 MHz ext_ref_frequency MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit * close #1254 * tested on innsbruck2 kasli variant * sponsored by Uni Innsbruck/AQT Signed-off-by: Robert Jördens --- artiq/firmware/runtime/rtio_clocking.rs | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/artiq/firmware/runtime/rtio_clocking.rs b/artiq/firmware/runtime/rtio_clocking.rs index 3277a2794..99a47fe3f 100644 --- a/artiq/firmware/runtime/rtio_clocking.rs +++ b/artiq/firmware/runtime/rtio_clocking.rs @@ -67,6 +67,19 @@ pub mod crg { #[cfg(si5324_as_synthesizer)] fn setup_si5324_as_synthesizer() { + // 125 MHz output from 10 MHz CLKIN2, 504 Hz BW + #[cfg(all(rtio_frequency = "125.0", si5324_ext_ref, ext_ref_frequency = "10.0"))] + const SI5324_SETTINGS: si5324::FrequencySettings + = si5324::FrequencySettings { + n1_hs : 10, + nc1_ls : 4, + n2_hs : 10, + n2_ls : 300, + n31 : 75, + n32 : 6, + bwsel : 4, + crystal_ref: false + }; // 125MHz output, from 100MHz CLKIN2 reference, 586 Hz loop bandwidth #[cfg(all(rtio_frequency = "125.0", si5324_ext_ref, ext_ref_frequency = "100.0"))] const SI5324_SETTINGS: si5324::FrequencySettings