mirror of https://github.com/m-labs/artiq.git
gateware/targets/sayma_amc_standalone: revert self.add_wb_slave on serwb
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@ -167,7 +167,7 @@ class SaymaAMCStandalone(MiniSoC, AMPSoC):
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serwb_core = serwb.core.SERWBCore(serwb_phy_amc, int(self.clk_freq), mode="slave")
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serwb_core = serwb.core.SERWBCore(serwb_phy_amc, int(self.clk_freq), mode="slave")
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self.submodules += serwb_core
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self.submodules += serwb_core
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self.register_mem("serwb", self.mem_map["serwb"], 8192, serwb_core.etherbone.wishbone.bus)
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self.add_wb_slave(self.mem_map["serwb"], 8192, serwb_core.etherbone.wishbone.bus)
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# RTIO
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# RTIO
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rtio_channels = []
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rtio_channels = []
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