mirror of https://github.com/m-labs/artiq.git
kasli/si5324: lock to 100 MHz with highest available bandwidth
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@ -113,7 +113,7 @@ fn startup() {
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#[cfg(si5324_as_synthesizer)]
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fn setup_si5324_as_synthesizer()
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{
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// 125MHz output, from 100MHz CLKIN2 reference, 9 Hz
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// 125MHz output, from 100MHz CLKIN2 reference, 586 Hz
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#[cfg(all(rtio_frequency = "125.0", si5324_ext_ref))]
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const SI5324_SETTINGS: board_artiq::si5324::FrequencySettings
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= board_artiq::si5324::FrequencySettings {
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@ -123,7 +123,7 @@ fn setup_si5324_as_synthesizer()
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n2_ls : 260,
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n31 : 65,
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n32 : 52,
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bwsel : 10,
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bwsel : 4,
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crystal_ref: false
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};
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// 125MHz output, from crystal, 7 Hz
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