mirror of https://github.com/m-labs/artiq.git
drtio: connect RST and LOCKED on 7series RXSynchronizer MMCM
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@ -223,6 +223,7 @@ class RXSynchronizer(Module, AutoCSR):
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Instance("MMCME2_ADV",
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p_CLKIN1_PERIOD=1e9/rtio_clk_freq,
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i_CLKIN1=ClockSignal("rtio_rx"),
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i_RST=ResetSignal("rtio_rx"),
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i_CLKINSEL=1, # yes, 1=CLKIN1 0=CLKIN2
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p_CLKFBOUT_MULT_F=mmcm_mult,
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@ -237,6 +238,7 @@ class RXSynchronizer(Module, AutoCSR):
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p_CLKOUT0_USE_FINE_PS="TRUE",
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o_CLKOUT0=mmcm_output,
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o_LOCKED=mmcm_locked,
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i_PSCLK=ClockSignal(),
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i_PSEN=self.phase_shift.re,
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