From dd570720ac0d3aa27f621a36a692906b73379992 Mon Sep 17 00:00:00 2001 From: Robert Jordens Date: Mon, 29 Feb 2016 17:29:37 +0100 Subject: [PATCH] gateware.spi: ack only in cycles --- artiq/gateware/spi.py | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/artiq/gateware/spi.py b/artiq/gateware/spi.py index 328419559..fd8f612c4 100644 --- a/artiq/gateware/spi.py +++ b/artiq/gateware/spi.py @@ -310,7 +310,7 @@ class SPIMaster(Module): spi.div_read.eq(config.div_read), ] self.sync += [ - bus.ack.eq(~bus.we | ~pending | spi.done), + bus.ack.eq(bus.cyc & bus.stb & (~bus.we | ~pending | spi.done)), If(wb_we, Array([data_write, xfer.raw_bits(), config.raw_bits() ])[bus.adr].eq(bus.dat_w)