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drtio-eem: CONFIG_EEM_TRANSCEIVERS -> CONFIG_EEM_DRTIO_COUNT

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linuswck 2023-08-25 11:49:20 +08:00 committed by Sebastien Bourdeauducq
parent 5d38db19d0
commit dc97d3aee6
2 changed files with 2 additions and 2 deletions
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2
artiq/firmware/libboard_artiq/drtio_eem.rs
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@ -188,7 +188,7 @@ unsafe fn align_comma() {
} }
pub fn init() { pub fn init() {
for trx_no in 0..csr::CONFIG_EEM_TRANSCEIVERS { for trx_no in 0..csr::CONFIG_EEM_DRTIO_COUNT {
unsafe { unsafe {
csr::eem_transceiver::transceiver_sel_write(trx_no as u8); csr::eem_transceiver::transceiver_sel_write(trx_no as u8);
} }

2
artiq/gateware/targets/efc.py
View File

@ -65,7 +65,7 @@ class Satellite(BaseSoC, AMPSoC):
self.submodules.eem_transceiver = eem_serdes.EEMSerdes(self.platform, data_pads) self.submodules.eem_transceiver = eem_serdes.EEMSerdes(self.platform, data_pads)
self.csr_devices.append("eem_transceiver") self.csr_devices.append("eem_transceiver")
self.config["HAS_DRTIO_EEM"] = None self.config["HAS_DRTIO_EEM"] = None
self.config["EEM_TRANSCEIVERS"] = 1 self.config["EEM_DRTIO_COUNT"] = 1
self.submodules.rtio_tsc = rtio.TSC(glbl_fine_ts_width=3) self.submodules.rtio_tsc = rtio.TSC(glbl_fine_ts_width=3)