jdcg: allow <=2 retries upon SYSREF test failure

artiq/firmware/satman/jdac_common.rs

@@ -9,6 +9,7 @@ pub const SYNC: u8              = 0x12;
 
 pub const DDMTD_SYSREF_RAW: u8  = 0x20;
 pub const DDMTD_SYSREF: u8      = 0x21;
+pub const DDMTD_INIT: u8        = 0x22;
 
 
 fn average_2phases(a: i32, b: i32, modulo: i32) -> i32 {

artiq/firmware/satman/jdcg.rs

@@ -410,9 +410,21 @@ pub mod jesd204sync {
     }
 
     pub fn sysref_auto_rtio_align() -> Result<(), &'static str> {
-        test_ddmtd_stability(true, 4)?;
-        test_ddmtd_stability(false, 1)?;
-        test_slip_ddmtd()?;
+        for i in 0..3 {        // Allow resetting DDMTD core 2 times at max
+            let result = {
+                test_ddmtd_stability(true, 4)?;
+                test_ddmtd_stability(false, 1)?;
+                test_slip_ddmtd()
+            };
+            if let Err(_) = result {
+                if i == 3 {
+                    error!("SYSREF test failed with too many retries");
+                    return result
+                }
+                warn!("SYSREF test failed, retrying...");
+                jdac::basic_request(0, jdac_common::DDMTD_INIT, 0)?;
+            } else { break }
+        }
 
         info!("determining SYSREF S/H limits...");
         let sysref_sh_limits = measure_sysref_sh_limits()?;

artiq/firmware/satman/main.rs

@@ -320,7 +320,8 @@ fn process_aux_packet(_repeaters: &mut [repeater::Repeater],
                     },
                     jdac_common::DDMTD_SYSREF_RAW => (true, jdac_common::measure_ddmdt_phase_raw() as u8),
                     jdac_common::DDMTD_SYSREF => (true, jdac_common::measure_ddmdt_phase() as u8),
-                    _ => (false, 0)
+                    jdac_common::DDMTD_INIT => (init_ddmtd_reset_ad9154().is_ok(), 0),
+                    _ => (false, 0),
                 }
             };
             #[cfg(not(has_ad9154))]
@@ -415,6 +416,15 @@ fn hardware_tick(ts: &mut u64) {
     }
 }
 
+#[cfg(has_ad9154)]
+fn init_ddmtd_reset_ad9154() -> Result<(), &'static str> {
+    jdac_common::init_ddmtd()?;
+    for dacno in 0..csr::CONFIG_AD9154_COUNT {
+        board_artiq::ad9154::reset_and_detect(dacno as u8)?;
+    }
+    Ok(())
+}
+
 #[cfg(all(has_si5324, rtio_frequency = "125.0"))]
 const SI5324_SETTINGS: si5324::FrequencySettings
     = si5324::FrequencySettings {