mirror of https://github.com/m-labs/artiq.git
test/full_stack: use Ethernet
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8a19766278
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@ -5,7 +5,7 @@ from fractions import Fraction
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from artiq import *
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from artiq.language.units import DimensionError
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from artiq.coredevice import comm_serial, core, runtime_exceptions, rtio
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from artiq.coredevice import comm_tcp, core, runtime_exceptions, rtio
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from artiq.sim import devices as sim_devices
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@ -13,7 +13,7 @@ core_device = os.getenv("ARTIQ_CORE_DEVICE")
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def _run_on_device(k_class, **parameters):
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comm = comm_serial.Comm(serial_dev=core_device)
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comm = comm_tcp.Comm(host=core_device)
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try:
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coredev = core.Core(comm=comm)
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k_inst = k_class(core=coredev, **parameters)
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@ -208,7 +208,7 @@ class ExecutionCase(unittest.TestCase):
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self.assertEqual(l_device, l_host)
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def test_misc(self):
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comm = comm_serial.Comm(serial_dev=core_device)
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comm = comm_tcp.Comm(host=core_device)
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try:
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coredev = core.Core(comm=comm)
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uut = _Misc(core=coredev)
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@ -249,7 +249,7 @@ class ExecutionCase(unittest.TestCase):
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self.assertEqual(t_device, t_host)
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def test_rpc_exceptions(self):
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comm = comm_serial.Comm(serial_dev=core_device)
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comm = comm_tcp.Comm(host=core_device)
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try:
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uut = _RPCExceptions(core=core.Core(comm=comm))
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with self.assertRaises(_MyException):
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@ -312,7 +312,7 @@ class RTIOCase(unittest.TestCase):
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# (C11 and C13 on Papilio Pro)
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def test_loopback(self):
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npulses = 4
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comm = comm_serial.Comm(serial_dev=core_device)
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comm = comm_tcp.Comm(host=core_device)
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try:
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coredev = core.Core(comm=comm)
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uut = _RTIOLoopback(
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@ -327,7 +327,7 @@ class RTIOCase(unittest.TestCase):
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comm.close()
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def test_underflow(self):
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comm = comm_serial.Comm(serial_dev=core_device)
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comm = comm_tcp.Comm(host=core_device)
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try:
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coredev = core.Core(comm=comm)
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uut = _RTIOUnderflow(
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@ -340,7 +340,7 @@ class RTIOCase(unittest.TestCase):
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comm.close()
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def test_sequence_error(self):
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comm = comm_serial.Comm(serial_dev=core_device)
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comm = comm_tcp.Comm(host=core_device)
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try:
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coredev = core.Core(comm=comm)
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uut = _RTIOSequenceError(
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