mirror of https://github.com/m-labs/artiq.git
pipistrello: remove unused constraint kwarg
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@ -50,7 +50,7 @@ NET "{int_clk}" TNM_NET = "GRPint_clk";
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NET "sys_clk" TNM_NET = "GRPsys_clk";
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TIMESPEC "TSfix_ise1" = FROM "GRPint_clk" TO "GRPsys_clk" TIG;
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TIMESPEC "TSfix_ise2" = FROM "GRPsys_clk" TO "GRPint_clk" TIG;
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""", int_clk=rtio_internal_clk, ext_clk=rtio_external_clk)
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""", int_clk=rtio_internal_clk)
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class NIST_QC1(BaseSoC, AMPSoC):
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