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https://github.com/m-labs/artiq.git
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Merge remote-tracking branch 'm-labs/master' into phaser2
* m-labs/master: applets: compatibility with older Qt. Closes #629 doc: update LLVM configure command (fixes #628). runtime: match argument signedness between ARTIQ Python and ksupport. runtime: refactor rtio_output_list. runtime: use correct ABI when accepting ARTIQ lists.
This commit is contained in:
commit
d5d17aca9e
@ -518,7 +518,7 @@ class AppletsDock(QtWidgets.QDockWidget):
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item.setFlags(QtCore.Qt.ItemIsSelectable |
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QtCore.Qt.ItemIsEditable |
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QtCore.Qt.ItemIsUserCheckable |
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QtCore.Qt.ItemIsAutoTristate |
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QtCore.Qt.ItemIsTristate |
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QtCore.Qt.ItemIsDragEnabled |
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QtCore.Qt.ItemIsDropEnabled |
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QtCore.Qt.ItemIsEnabled)
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@ -102,7 +102,7 @@ static mut API: &'static [(&'static str, *const ())] = &[
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api!(rtio_get_counter = ::rtio::get_counter),
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api!(rtio_log),
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api!(rtio_output = ::rtio::output),
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api!(rtio_output_list = ::rtio::output_list),
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api!(rtio_output_wide = ::rtio::output_wide),
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api!(rtio_input_timestamp = ::rtio::input_timestamp),
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api!(rtio_input_data = ::rtio::input_data),
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@ -75,7 +75,9 @@ mod imp {
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use self::imp::*;
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pub extern fn init(busno: u32) {
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pub extern fn init(busno: i32) {
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let busno = busno as u32;
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// Set SCL as output, and high level
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scl_o(busno, true);
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scl_oe(busno, true);
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@ -92,7 +94,9 @@ pub extern fn init(busno: u32) {
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}
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}
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pub extern fn start(busno: u32) {
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pub extern fn start(busno: i32) {
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let busno = busno as u32;
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// Set SCL high then SDA low
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scl_o(busno, true);
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half_period();
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@ -100,7 +104,9 @@ pub extern fn start(busno: u32) {
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half_period();
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}
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pub extern fn stop(busno: u32) {
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pub extern fn stop(busno: i32) {
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let busno = busno as u32;
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// First, make sure SCL is low, so that the target releases the SDA line
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scl_o(busno, false);
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half_period();
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@ -112,7 +118,9 @@ pub extern fn stop(busno: u32) {
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half_period();
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}
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pub extern fn write(busno: u32, data: u8) -> bool {
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pub extern fn write(busno: i32, data: i8) -> bool {
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let (busno, data) = (busno as u32, data as u8);
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// MSB first
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for bit in (0..8).rev() {
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// Set SCL low and set our bit on SDA
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@ -135,7 +143,9 @@ pub extern fn write(busno: u32, data: u8) -> bool {
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!sda_i(busno)
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}
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pub extern fn read(busno: u32, ack: bool) -> u8 {
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pub extern fn read(busno: i32, ack: bool) -> i8 {
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let busno = busno as u32;
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// Set SCL low first, otherwise setting SDA as input may cause a transition
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// on SDA with SCL high which will be interpreted as START/STOP condition.
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scl_o(busno, false);
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@ -162,5 +172,5 @@ pub extern fn read(busno: u32, ack: bool) -> u8 {
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scl_o(busno, true);
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half_period();
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data
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data as i8
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}
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@ -120,6 +120,22 @@ extern fn panic_fmt(args: core::fmt::Arguments, file: &'static str, line: u32) -
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loop {}
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}
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#[repr(C)]
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pub struct ArtiqList<T> {
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len: usize,
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ptr: *const T
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}
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impl<T> ArtiqList<T> {
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pub fn from_slice(slice: &'static [T]) -> ArtiqList<T> {
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ArtiqList { ptr: slice.as_ptr(), len: slice.len() }
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}
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pub unsafe fn as_slice(&self) -> &[T] {
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slice::from_raw_parts(self.ptr, self.len)
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}
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}
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static mut NOW: u64 = 0;
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#[no_mangle]
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@ -210,35 +226,34 @@ pub extern fn __artiq_terminate(exception: *const kernel_proto::Exception,
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loop {}
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}
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extern fn watchdog_set(ms: i64) -> usize {
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extern fn watchdog_set(ms: i64) -> i32 {
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if ms < 0 {
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artiq_raise!("ValueError", "cannot set a watchdog with a negative timeout")
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}
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send(&WatchdogSetRequest { ms: ms as u64 });
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recv!(&WatchdogSetReply { id } => id)
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recv!(&WatchdogSetReply { id } => id) as i32
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}
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extern fn watchdog_clear(id: usize) {
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send(&WatchdogClear { id: id })
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extern fn watchdog_clear(id: i32) {
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send(&WatchdogClear { id: id as usize })
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}
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extern fn cache_get(key: *const u8) -> (usize, *const u32) {
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extern fn cache_get(key: *const u8) -> ArtiqList<i32> {
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extern { fn strlen(s: *const c_char) -> size_t; }
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let key = unsafe { slice::from_raw_parts(key, strlen(key as *const c_char)) };
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let key = unsafe { str::from_utf8_unchecked(key) };
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send(&CacheGetRequest { key: key });
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recv!(&CacheGetReply { value } => (value.len(), value.as_ptr()))
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recv!(&CacheGetReply { value } => ArtiqList::from_slice(value))
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}
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extern fn cache_put(key: *const u8, &(len, ptr): &(usize, *const u32)) {
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extern fn cache_put(key: *const u8, list: ArtiqList<i32>) {
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extern { fn strlen(s: *const c_char) -> size_t; }
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let key = unsafe { slice::from_raw_parts(key, strlen(key as *const c_char)) };
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let key = unsafe { str::from_utf8_unchecked(key) };
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let value = unsafe { slice::from_raw_parts(ptr, len) };
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send(&CachePutRequest { key: key, value: value });
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send(&CachePutRequest { key: key, value: unsafe { list.as_slice() } });
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recv!(&CachePutReply { succeeded } => {
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if !succeeded {
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artiq_raise!("CacheError", "cannot put into a busy cache row")
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@ -1,6 +1,6 @@
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use board::csr;
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use core::ptr::{read_volatile, write_volatile};
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use core::slice;
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use ::ArtiqList;
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const RTIO_O_STATUS_FULL: u32 = 1;
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const RTIO_O_STATUS_UNDERFLOW: u32 = 2;
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@ -26,20 +26,20 @@ pub extern fn get_counter() -> i64 {
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}
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#[inline(always)]
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pub unsafe fn rtio_o_data_write(w: u32) {
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pub unsafe fn rtio_o_data_write(offset: usize, data: u32) {
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write_volatile(
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csr::rtio::O_DATA_ADDR.offset((csr::rtio::O_DATA_SIZE - 1) as isize),
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w);
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csr::rtio::O_DATA_ADDR.offset((csr::rtio::O_DATA_SIZE - 1 - offset) as isize),
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data);
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}
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#[inline(always)]
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pub unsafe fn rtio_i_data_read() -> u32 {
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pub unsafe fn rtio_i_data_read(offset: usize) -> u32 {
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read_volatile(
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csr::rtio::I_DATA_ADDR.offset((csr::rtio::I_DATA_SIZE - 1) as isize))
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csr::rtio::I_DATA_ADDR.offset((csr::rtio::I_DATA_SIZE - 1 - offset) as isize))
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}
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#[inline(never)]
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unsafe fn process_exceptional_status(timestamp: i64, channel: u32, status: u32) {
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unsafe fn process_exceptional_status(timestamp: i64, channel: i32, status: u32) {
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if status & RTIO_O_STATUS_FULL != 0 {
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while csr::rtio::o_status_read() & RTIO_O_STATUS_FULL != 0 {}
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}
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@ -69,12 +69,12 @@ unsafe fn process_exceptional_status(timestamp: i64, channel: u32, status: u32)
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}
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}
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pub extern fn output(timestamp: i64, channel: u32, addr: u32, data: u32) {
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pub extern fn output(timestamp: i64, channel: i32, addr: i32, data: i32) {
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unsafe {
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csr::rtio::chan_sel_write(channel);
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csr::rtio::chan_sel_write(channel as u32);
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csr::rtio::o_timestamp_write(timestamp as u64);
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csr::rtio::o_address_write(addr);
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rtio_o_data_write(data);
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csr::rtio::o_address_write(addr as u32);
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rtio_o_data_write(0, data as u32);
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csr::rtio::o_we_write(1);
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let status = csr::rtio::o_status_read();
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if status != 0 {
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@ -83,17 +83,14 @@ pub extern fn output(timestamp: i64, channel: u32, addr: u32, data: u32) {
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}
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}
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pub extern fn output_list(timestamp: i64, channel: u32, addr: u32,
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&(len, ptr): &(usize, *const u32)) {
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pub extern fn output_wide(timestamp: i64, channel: i32, addr: i32, list: ArtiqList<i32>) {
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unsafe {
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csr::rtio::chan_sel_write(channel);
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csr::rtio::chan_sel_write(channel as u32);
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csr::rtio::o_timestamp_write(timestamp as u64);
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csr::rtio::o_address_write(addr);
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let data = slice::from_raw_parts(ptr, len);
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csr::rtio::o_address_write(addr as u32);
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let data = list.as_slice();
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for i in 0..data.len() {
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write_volatile(
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csr::rtio::O_DATA_ADDR.offset((csr::rtio::O_DATA_SIZE - 1 - i) as isize),
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data[i]);
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rtio_o_data_write(i, data[i] as u32)
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}
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csr::rtio::o_we_write(1);
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let status = csr::rtio::o_status_read();
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@ -103,9 +100,9 @@ pub extern fn output_list(timestamp: i64, channel: u32, addr: u32,
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}
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}
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pub extern fn input_timestamp(timeout: i64, channel: u32) -> u64 {
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pub extern fn input_timestamp(timeout: i64, channel: i32) -> u64 {
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unsafe {
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csr::rtio::chan_sel_write(channel);
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csr::rtio::chan_sel_write(channel as u32);
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let mut status;
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loop {
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status = csr::rtio::i_status_read();
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@ -139,9 +136,9 @@ pub extern fn input_timestamp(timeout: i64, channel: u32) -> u64 {
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}
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}
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pub extern fn input_data(channel: u32) -> u32 {
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pub extern fn input_data(channel: i32) -> i32 {
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unsafe {
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csr::rtio::chan_sel_write(channel);
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csr::rtio::chan_sel_write(channel as u32);
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loop {
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let status = csr::rtio::i_status_read();
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if status == 0 { break }
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@ -154,9 +151,9 @@ pub extern fn input_data(channel: u32) -> u32 {
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}
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}
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let data = rtio_i_data_read();
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let data = rtio_i_data_read(0);
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csr::rtio::i_re_write(1);
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data
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data as i32
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}
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}
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@ -171,14 +168,14 @@ pub fn log(timestamp: i64, data: &[u8]) {
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word <<= 8;
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word |= data[i] as u32;
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if i % 4 == 0 {
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rtio_o_data_write(word);
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rtio_o_data_write(0, word);
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csr::rtio::o_we_write(1);
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word = 0;
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}
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}
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word <<= 8;
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rtio_o_data_write(word);
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rtio_o_data_write(0, word);
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csr::rtio::o_we_write(1);
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}
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}
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@ -4,7 +4,7 @@ use std::btree_map::BTreeMap;
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#[derive(Debug)]
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struct Entry {
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data: Vec<u32>,
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data: Vec<i32>,
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borrowed: bool
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}
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@ -18,7 +18,7 @@ impl Cache {
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Cache { entries: BTreeMap::new() }
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}
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pub fn get(&mut self, key: &str) -> *const [u32] {
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pub fn get(&mut self, key: &str) -> *const [i32] {
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match self.entries.get_mut(key) {
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None => &[],
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Some(ref mut entry) => {
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@ -28,7 +28,7 @@ impl Cache {
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}
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}
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pub fn put(&mut self, key: &str, data: &[u32]) -> Result<(), ()> {
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pub fn put(&mut self, key: &str, data: &[i32]) -> Result<(), ()> {
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match self.entries.get_mut(key) {
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None => (),
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Some(ref mut entry) => {
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@ -51,8 +51,8 @@ pub enum Message<'a> {
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RpcRecvReply(Result<usize, Exception<'a>>),
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CacheGetRequest { key: &'a str },
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CacheGetReply { value: &'static [u32] },
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CachePutRequest { key: &'a str, value: &'static [u32] },
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CacheGetReply { value: &'static [i32] },
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CachePutRequest { key: &'a str, value: &'a [i32] },
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CachePutReply { succeeded: bool },
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Log(fmt::Arguments<'a>),
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@ -406,7 +406,7 @@ fn process_kern_message(waiter: Waiter,
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&kern::CacheGetRequest { key } => {
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let value = session.congress.cache.get(key);
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kern_send(waiter, &kern::CacheGetReply {
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value: unsafe { mem::transmute::<*const [u32], &'static [u32]>(value) }
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value: unsafe { mem::transmute::<*const [i32], &'static [i32]>(value) }
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})
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}
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@ -470,7 +470,7 @@ fn process_kern_message(waiter: Waiter,
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}
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fn process_kern_queued_rpc(stream: &mut TcpStream,
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session: &mut Session) -> io::Result<()> {
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_session: &mut Session) -> io::Result<()> {
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rpc_queue::dequeue(|slice| {
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trace!("comm<-kern (async RPC)");
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let length = NetworkEndian::read_u32(slice) as usize;
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@ -54,7 +54,7 @@ and the ARTIQ kernels.
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$ mkdir build
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$ cd build
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$ cmake .. -DCMAKE_BUILD_TYPE=Release -DCMAKE_INSTALL_PREFIX=/usr/local/llvm-or1k -DLLVM_TARGETS_TO_BUILD="OR1K;X86" -DLLVM_ENABLE_ASSERTIONS=ON
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$ cmake .. -DCMAKE_BUILD_TYPE=Release -DCMAKE_INSTALL_PREFIX=/usr/local/llvm-or1k -DLLVM_TARGETS_TO_BUILD="OR1K;X86" -DLLVM_ENABLE_ASSERTIONS=ON -DLLVM_INSTALL_UTILS=ON
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$ make -j4
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$ sudo make install
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