diff --git a/artiq/gateware/eem.py b/artiq/gateware/eem.py
index 35b87fc4a..0180989de 100644
--- a/artiq/gateware/eem.py
+++ b/artiq/gateware/eem.py
@@ -144,20 +144,20 @@ class Urukul(_EEM):
                 ))
         ios += [
             ("urukul{}_qspi_p".format(eem0), 0,
-                Subsignal("cs", Pins(_eem_pin(eem0, 5, "p"), iostandard(eem0))),
-                Subsignal("clk", Pins(_eem_pin(eem0, 2, "p"), iostandard(eem0))),
-                Subsignal("mosi0", Pins(_eem_pin(eem1, 0, "p"), iostandard(eem1))),
-                Subsignal("mosi1", Pins(_eem_pin(eem1, 1, "p"), iostandard(eem1))),
-                Subsignal("mosi2", Pins(_eem_pin(eem1, 2, "p"), iostandard(eem1))),
-                Subsignal("mosi3", Pins(_eem_pin(eem1, 3, "p"), iostandard(eem1))),
+                Subsignal("cs", Pins(_eem_pin(eem0, 5, "p")), iostandard(eem0)),
+                Subsignal("clk", Pins(_eem_pin(eem0, 2, "p")), iostandard(eem0)),
+                Subsignal("mosi0", Pins(_eem_pin(eem1, 0, "p")), iostandard(eem1)),
+                Subsignal("mosi1", Pins(_eem_pin(eem1, 1, "p")), iostandard(eem1)),
+                Subsignal("mosi2", Pins(_eem_pin(eem1, 2, "p")), iostandard(eem1)),
+                Subsignal("mosi3", Pins(_eem_pin(eem1, 3, "p")), iostandard(eem1)),
             ),
             ("urukul{}_qspi_n".format(eem0), 0,
-                Subsignal("cs", Pins(_eem_pin(eem0, 5, "n"), iostandard(eem0))),
-                Subsignal("clk", Pins(_eem_pin(eem0, 2, "n"), iostandard(eem0))),
-                Subsignal("mosi0", Pins(_eem_pin(eem1, 0, "n"), iostandard(eem1))),
-                Subsignal("mosi1", Pins(_eem_pin(eem1, 1, "n"), iostandard(eem1))),
-                Subsignal("mosi2", Pins(_eem_pin(eem1, 2, "n"), iostandard(eem1))),
-                Subsignal("mosi3", Pins(_eem_pin(eem1, 3, "n"), iostandard(eem1))),
+                Subsignal("cs", Pins(_eem_pin(eem0, 5, "n")), iostandard(eem0)),
+                Subsignal("clk", Pins(_eem_pin(eem0, 2, "n")), iostandard(eem0)),
+                Subsignal("mosi0", Pins(_eem_pin(eem1, 0, "n")), iostandard(eem1)),
+                Subsignal("mosi1", Pins(_eem_pin(eem1, 1, "n")), iostandard(eem1)),
+                Subsignal("mosi2", Pins(_eem_pin(eem1, 2, "n")), iostandard(eem1)),
+                Subsignal("mosi3", Pins(_eem_pin(eem1, 3, "n")), iostandard(eem1)),
             ),
         ]
         return ios