mirror of https://github.com/m-labs/artiq.git
test_compile: port to NAC3
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@ -3,6 +3,8 @@ import sys
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import subprocess
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import unittest
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import tempfile
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from artiq.coredevice.core import Core
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from artiq.coredevice.comm_mgmt import CommMgmt
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from artiq.test.hardware_testbench import ExperimentCase
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from artiq.experiment import *
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@ -11,7 +13,16 @@ from artiq.experiment import *
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artiq_root = os.getenv("ARTIQ_ROOT")
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# NAC3TODO https://git.m-labs.hk/M-Labs/nac3/issues/297
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@extern
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def core_log(s: str):
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...
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@nac3
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class CheckLog(EnvExperiment):
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core: KernelInvariant[Core]
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def build(self):
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self.setattr_device("core")
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@ -20,6 +31,7 @@ class CheckLog(EnvExperiment):
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core_log("test_artiq_compile")
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@unittest.skip("NAC3TODO https://git.m-labs.hk/M-Labs/nac3/issues/300")
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class TestCompile(ExperimentCase):
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def test_compile(self):
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core_addr = self.device_mgr.get_desc("core")["arguments"]["host"]
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