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ad9912: clean up
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d8dbab024d
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@ -1,11 +1,5 @@
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"""
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from artiq.language.core import kernel, delay_mu, delay, portable
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Driver for the AD9912 DDS.
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"""
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from artiq.language.core import kernel, delay_mu, delay
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from artiq.language.units import us, ns
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from artiq.language.units import us, ns
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from artiq.coredevice import spi, urukul
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from artiq.coredevice.ad9912_reg import *
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from artiq.coredevice.ad9912_reg import *
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from numpy import int32, int64
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from numpy import int32, int64
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@ -13,7 +7,7 @@ from numpy import int32, int64
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class AD9912:
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class AD9912:
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"""
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"""
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Support for the Analog devices AD9912 DDS
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Support for the AD9912 DDS on Urukul
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:param chip_select: Chip select configuration.
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:param chip_select: Chip select configuration.
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:param cpld_device: Name of the Urukul CPLD this device is on.
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:param cpld_device: Name of the Urukul CPLD this device is on.
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@ -32,7 +26,7 @@ class AD9912:
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if sw_device:
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if sw_device:
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self.sw = dmgr.get(sw_device)
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self.sw = dmgr.get(sw_device)
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self.pll_n = pll_n
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self.pll_n = pll_n
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self.sysclk = self.cpld.refclk * pll_n
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self.sysclk = self.cpld.refclk*pll_n
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self.ftw_per_hz = 1/self.sysclk*(int64(1) << 48)
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self.ftw_per_hz = 1/self.sysclk*(int64(1) << 48)
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@kernel
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@kernel
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@ -43,9 +37,7 @@ class AD9912:
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self.bus.write((addr | ((length - 1) << 13)) << 16)
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self.bus.write((addr | ((length - 1) << 13)) << 16)
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delay_mu(-self.bus.xfer_period_mu)
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delay_mu(-self.bus.xfer_period_mu)
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self.bus.set_xfer(self.chip_select, length*8, 0)
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self.bus.set_xfer(self.chip_select, length*8, 0)
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if length < 4:
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self.bus.write(data << (32 - length*8))
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data <<= 32 - length*8
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self.bus.write(data)
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delay_mu(self.bus.xfer_period_mu - self.bus.write_period_mu)
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delay_mu(self.bus.xfer_period_mu - self.bus.write_period_mu)
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@kernel
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@kernel
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