M-Labs
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artiq
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use new misoc identifier

This commit is contained in:
Sebastien Bourdeauducq 2018-02-22 11:17:23 +08:00
parent 1568e55388
commit cb605cf014
1 changed files with 7 additions and 5 deletions
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12
artiq/firmware/libboard/lib.rs
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@ -5,7 +5,7 @@ extern crate byteorder;
#[macro_use]
extern crate log;
use core::{cmp, ptr, str};
use core::{cmp, str};
include!(concat!(env!("BUILDINC_DIRECTORY"), "/generated/mem.rs"));
include!(concat!(env!("BUILDINC_DIRECTORY"), "/generated/csr.rs"));
@ -45,11 +45,13 @@ pub use uart_console::Console;
pub fn ident(buf: &mut [u8]) -> &str {
unsafe {
let len = ptr::read_volatile(csr::IDENTIFIER_MEM_BASE);
let len = cmp::min(len as usize, buf.len());
csr::identifier::address_write(0);
let len = csr::identifier::data_read();
let len = cmp::min(len, buf.len() as u8);
for i in 0..len {
buf[i] = ptr::read_volatile(csr::IDENTIFIER_MEM_BASE.offset(1 + i as isize)) as u8
csr::identifier::address_write(1 + i);
buf[i as usize] = csr::identifier::data_read();
}
str::from_utf8_unchecked(&buf[..len])
str::from_utf8_unchecked(&buf[..len as usize])
}
}