M-Labs/artiq
2
0
Fork 2
mirror of https://github.com/m-labs/artiq.git synced 2024-12-25 11:18:27 +08:00
Code Issues Projects Releases Wiki Activity

doc: add core device comms details

Browse Source
This commit is contained in:
Sebastien Bourdeauducq 2016-06-11 10:01:15 -06:00
parent 3bd190e624
commit ca9724f517
1 changed files with 4 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
doc/manual/core_device.rst
View File

@ -24,6 +24,8 @@ This flash storage space can be accessed by using ``artiq_coreconfig`` (see: :re
FPGA board ports
****************
All boards have a serial interface running at 115200bps 8-N-1 that can be used for debugging.
KC705
-----
@ -156,6 +158,8 @@ The low-cost Pipistrello FPGA board can be used as a lower-cost but slower alter
pppd /dev/ttyUSB1 115200 noauth nodetach local nocrtscts novj 10.0.0.1:10.0.0.2
.. warning:: Windows is not supported.
When plugged to an adapter, the NIST QC1 hardware can be used. The TTL lines are mapped to RTIO channels as follows:
+--------------+------------+--------------+