mirror of https://github.com/m-labs/artiq.git
sayma: reduce serwb linerate to 500Mbps
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@ -170,7 +170,7 @@ class Standalone(MiniSoC, AMPSoC):
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# AMC/RTM serwb
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# AMC/RTM serwb
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serwb_pads = platform.request("amc_rtm_serwb")
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serwb_pads = platform.request("amc_rtm_serwb")
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serwb_phy_amc = serwb.phy.SERWBPHY(platform.device, serwb_pads, mode="master")
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serwb_phy_amc = serwb.phy.SERWBPHY(platform.device, serwb_pads, mode="master", phy_width=4)
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self.submodules.serwb_phy_amc = serwb_phy_amc
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self.submodules.serwb_phy_amc = serwb_phy_amc
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self.csr_devices.append("serwb_phy_amc")
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self.csr_devices.append("serwb_phy_amc")
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@ -156,7 +156,7 @@ class SaymaRTM(Module):
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# AMC/RTM serwb
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# AMC/RTM serwb
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serwb_pads = platform.request("amc_rtm_serwb")
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serwb_pads = platform.request("amc_rtm_serwb")
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platform.add_period_constraint(serwb_pads.clk_p, 10.)
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platform.add_period_constraint(serwb_pads.clk_p, 10.)
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serwb_phy_rtm = serwb.phy.SERWBPHY(platform.device, serwb_pads, mode="slave")
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serwb_phy_rtm = serwb.phy.SERWBPHY(platform.device, serwb_pads, mode="slave", phy_width=4)
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self.submodules.serwb_phy_rtm = serwb_phy_rtm
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self.submodules.serwb_phy_rtm = serwb_phy_rtm
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self.comb += self.crg.serwb_refclk.eq(serwb_phy_rtm.serdes.refclk)
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self.comb += self.crg.serwb_refclk.eq(serwb_phy_rtm.serdes.refclk)
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csr_devices.append("serwb_phy_rtm")
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csr_devices.append("serwb_phy_rtm")
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