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phaser: cleanup jesd phy instantiation a bit
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01bfe54dde
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@ -472,15 +472,14 @@ class AD9154(Module, AutoCSR):
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jesd_phy = JESD204BPhyTX(
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jesd_phy = JESD204BPhyTX(
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jesd_qpll, platform.request("ad9154_jesd", i),
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jesd_qpll, platform.request("ad9154_jesd", i),
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rtio_freq)
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rtio_freq)
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jesd_phys.append(jesd_phy)
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setattr(self.submodules, "jesd_phy"+str(i), jesd_phy)
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for jesd_phy in jesd_phys:
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platform.add_period_constraint(
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platform.add_period_constraint(
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jesd_phy.gtx.cd_tx.clk,
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jesd_phy.gtx.cd_tx.clk,
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40/jesd_linerate*1e9)
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40/jesd_linerate*1e9)
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platform.add_false_path_constraints(
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platform.add_false_path_constraints(
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rtio_crg.cd_rtio.clk,
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rtio_crg.cd_rtio.clk,
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jesd_phy.gtx.cd_tx.clk)
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jesd_phy.gtx.cd_tx.clk)
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jesd_phys.append(jesd_phy)
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setattr(self.submodules, "jesd_phy"+str(i), jesd_phy)
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self.submodules.jesd_core = JESD204BCoreTX(
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self.submodules.jesd_core = JESD204BCoreTX(
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jesd_phys, jesd_settings, converter_data_width=32)
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jesd_phys, jesd_settings, converter_data_width=32)
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self.comb += self.jesd_core.start.eq(jesd_sync)
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self.comb += self.jesd_core.start.eq(jesd_sync)
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