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drtio: change data direction in _CrossDomainRequest

This commit is contained in:
Sebastien Bourdeauducq 2016-10-21 22:44:47 +08:00
parent 6a88229e6a
commit c71c4c89e0
2 changed files with 10 additions and 10 deletions
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9
artiq/gateware/drtio/rt_packets.py
View File

@ -333,14 +333,15 @@ class _CrossDomainRequest(Module):
If(req_ack, ongoing.eq(0))
]
if req_data is not None:
srv_data_r = Signal.like(srv_data)
dsync += If(srv_stb & srv_ack, srv_data_r.eq(srv_data))
self.specials += NoRetiming(srv_data_r)
self.sync += If(reply.o, req_data.eq(srv_data_r))
req_data_r = Signal.like(req_data)
self.specials += NoRetiming(req_data_r)
self.sync += If(req_stb, req_data_r.eq(req_data))
dsync += [
If(request.o, srv_stb.eq(1)),
If(srv_ack, srv_stb.eq(0))
]
if req_data is not None:
dsync += If(request.o, srv_data.eq(req_data_r))
self.comb += reply.i.eq(srv_stb & srv_ack)

11
artiq/test/gateware/drtio/test_rt_packets.py
View File

@ -125,10 +125,9 @@ class TestSatellite(unittest.TestCase):
class TestCrossDomainRequest(unittest.TestCase):
def test_cross_domain_request(self):
prng = random.Random(1)
for sys_freq in 3, 6, 11:
for srv_freq in 3, 6, 11:
prng = random.Random(1)
req_stb = Signal()
req_ack = Signal()
req_data = Signal(8)
@ -139,23 +138,23 @@ class TestCrossDomainRequest(unittest.TestCase):
received_seq = []
def requester():
for i in range(len(test_seq)):
for data in test_seq:
yield req_data.eq(data)
yield req_stb.eq(1)
yield
while not (yield req_ack):
yield
received_seq.append((yield req_data))
yield req_stb.eq(0)
for j in range(prng.randrange(0, 10)):
yield
def server():
for data in test_seq:
for i in range(len(test_seq)):
while not (yield srv_stb):
yield
received_seq.append((yield srv_data))
for j in range(prng.randrange(0, 10)):
yield
yield srv_data.eq(data)
yield srv_ack.eq(1)
yield
yield srv_ack.eq(0)