mirror of https://github.com/m-labs/artiq.git
hmc7043: disable FPGA_ADC_SYSREF
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@ -174,7 +174,7 @@ pub mod hmc7043 {
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(true, FPGA_CLK_DIV, 0x08), // 8: GTP_CLK1
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(true, FPGA_CLK_DIV, 0x08), // 8: GTP_CLK1
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(false, 0, 0x10), // 9: AMC_MASTER_AUX_CLK
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(false, 0, 0x10), // 9: AMC_MASTER_AUX_CLK
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(false, 0, 0x10), // 10: RTM_MASTER_AUX_CLK
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(false, 0, 0x10), // 10: RTM_MASTER_AUX_CLK
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(true, FPGA_CLK_DIV, 0x10), // 11: FPGA_ADC_SYSREF, LVDS -- repurposed for siphaser
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(false, 0, 0x10), // 11: FPGA_ADC_SYSREF, LVDS
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(false, 0, 0x08), // 12: ADC1_CLK
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(false, 0, 0x08), // 12: ADC1_CLK
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(false, 0, 0x08), // 13: ADC1_SYSREF
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(false, 0, 0x08), // 13: ADC1_SYSREF
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];
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];
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