M-Labs
/
artiq
mirror of https://github.com/m-labs/artiq.git
2
0
Fork 2
Code Issues Projects Releases Wiki Activity

phaser: tweak slacks

This commit is contained in:
Robert Jördens 2020-09-26 21:16:08 +00:00
parent 6c8bddcf8d
commit c453c24fb0
1 changed files with 5 additions and 5 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

10
artiq/coredevice/phaser.py
View File

@ -177,14 +177,14 @@ class Phaser:
board_id = self.read8(PHASER_ADDR_BOARD_ID) board_id = self.read8(PHASER_ADDR_BOARD_ID)
if board_id != PHASER_BOARD_ID: if board_id != PHASER_BOARD_ID:
raise ValueError("invalid board id") raise ValueError("invalid board id")
delay(20*us) # slack delay(.1*ms) # slack
hw_rev = self.read8(PHASER_ADDR_HW_REV) hw_rev = self.read8(PHASER_ADDR_HW_REV)
delay(20*us) # slack delay(.1*ms) # slack
is_baseband = hw_rev & PHASER_HW_REV_VARIANT is_baseband = hw_rev & PHASER_HW_REV_VARIANT
gw_rev = self.read8(PHASER_ADDR_GW_REV) gw_rev = self.read8(PHASER_ADDR_GW_REV)
delay(20*us) # slack delay(.1*ms) # slack
# allow a few errors during startup and alignment since boot # allow a few errors during startup and alignment since boot
if self.get_crc_err() > 20: if self.get_crc_err() > 20:
@ -218,13 +218,13 @@ class Phaser:
delay(.1*ms) delay(.1*ms)
t = self.get_dac_temperature() t = self.get_dac_temperature()
delay(.5*ms) delay(.1*ms)
if t < 10 or t > 90: if t < 10 or t > 90:
raise ValueError("DAC temperature out of bounds") raise ValueError("DAC temperature out of bounds")
for data in self.dac_mmap: for data in self.dac_mmap:
self.dac_write(data >> 16, data) self.dac_write(data >> 16, data)
delay(20*us) delay(40*us)
# pll_ndivsync_ena disable # pll_ndivsync_ena disable
config18 = self.dac_read(0x18) config18 = self.dac_read(0x18)