mirror of https://github.com/m-labs/artiq.git
sayma_amc: fix syntax
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cdd27249a2
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@ -53,7 +53,7 @@ class SatelliteBase(MiniSoC):
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}
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mem_map.update(MiniSoC.mem_map)
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def __init__(self, rtio_clk_freq=125e6, identifier_suffix="", gateware_identifier_str=None, with_sfp=False, *, **kwargs):
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def __init__(self, rtio_clk_freq=125e6, identifier_suffix="", gateware_identifier_str=None, with_sfp=False, **kwargs):
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MiniSoC.__init__(self,
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cpu_type="or1k",
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sdram_controller_type="minicon",
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