From c0f1708c2085c8f164137ade88cce5a063156aab Mon Sep 17 00:00:00 2001 From: Sebastien Bourdeauducq Date: Tue, 14 Apr 2015 19:34:14 +0800 Subject: [PATCH] targets/pipstrello: fix mem_map --- soc/targets/artiq_pipistrello.py | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/soc/targets/artiq_pipistrello.py b/soc/targets/artiq_pipistrello.py index a6f70e431..5fdf507a1 100644 --- a/soc/targets/artiq_pipistrello.py +++ b/soc/targets/artiq_pipistrello.py @@ -55,7 +55,7 @@ class _Peripherals(BaseSoC): "rtio": 0x20000000, # (shadow @0xa0000000) "dds": 0x50000000, # (shadow @0xd0000000) } - mem_map.update(MiniSoC.mem_map) + mem_map.update(BaseSoC.mem_map) def __init__(self, platform, cpu_type="or1k", **kwargs): BaseSoC.__init__(self, platform, cpu_type=cpu_type, **kwargs)