M-Labs
/
artiq
mirror of https://github.com/m-labs/artiq.git
2
0
Fork 2
Code Issues Projects Releases Wiki Activity

drtio/gth: use async microscope probes

This commit is contained in:
Sebastien Bourdeauducq 2017-12-28 16:36:47 +08:00
parent d94db1de5d
commit c086149782
1 changed files with 4 additions and 5 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

9
artiq/gateware/drtio/transceiver/gth_ultrascale.py
View File

@ -173,9 +173,9 @@ class GTHSingle(Module):
) )
self.submodules += [ self.submodules += [
add_probe_single("drtio_gth", "cpll_lock", cpll_lock), add_probe_async("drtio_gth", "cpll_lock", cpll_lock),
add_probe_single("drtio_gth", "txuserrdy", tx_init.Xxuserrdy), add_probe_async("drtio_gth", "txuserrdy", tx_init.Xxuserrdy),
add_probe_single("drtio_gth", "rxuserrdy", rx_init.Xxuserrdy, clock_domain="rtio_tx"), add_probe_async("drtio_gth", "rxuserrdy", rx_init.Xxuserrdy),
add_probe_buffer("drtio_gth", "txdata", txdata, clock_domain="rtio_tx"), add_probe_buffer("drtio_gth", "txdata", txdata, clock_domain="rtio_tx"),
add_probe_buffer("drtio_gth", "rxdata", rxdata, clock_domain="rtio_rx") add_probe_buffer("drtio_gth", "rxdata", rxdata, clock_domain="rtio_rx")
] ]
@ -215,8 +215,7 @@ class GTHSingle(Module):
rx_init.restart.eq(clock_aligner.restart), rx_init.restart.eq(clock_aligner.restart),
self.rx_ready.eq(clock_aligner.ready) self.rx_ready.eq(clock_aligner.ready)
] ]
self.submodules += add_probe_single("drtio_gth", "clock_aligner_ready", clock_aligner.ready, self.submodules += add_probe_async("drtio_gth", "clock_aligner_ready", clock_aligner.ready)
clock_domain="rtio_tx")
class GTH(Module, TransceiverInterface): class GTH(Module, TransceiverInterface):