mirror of https://github.com/m-labs/artiq.git
Add bool coercion support.
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@ -284,8 +284,33 @@ class ARTIQIRGenerator(algorithm.Visitor):
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finally:
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self.current_assign = None
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def coerce_to_bool(self, insn, block=None):
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if builtins.is_bool(insn.type):
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return insn
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elif builtins.is_int(insn.type):
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return self.append(ir.Compare(ast.NotEq(loc=None), insn, ir.Constant(0, insn.type)),
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block=block)
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elif builtins.is_float(insn.type):
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return self.append(ir.Compare(ast.NotEq(loc=None), insn, ir.Constant(0, insn.type)),
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block=block)
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elif builtins.is_iterable(insn.type):
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length = self.iterable_len(insn)
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return self.append(ir.Compare(ast.NotEq(loc=None), length, ir.Constant(0, length.type)),
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block=block)
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else:
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note = diagnostic.Diagnostic("note",
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"this expression has type {type}",
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{"type": types.TypePrinter().name(insn.type)},
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insn.loc)
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diag = diagnostic.Diagnostic("warning",
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"this expression, which is always truthful, is coerced to bool", {},
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insn.loc, notes=[note])
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self.engine.process(diag)
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return ir.Constant(True, builtins.TBool())
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def visit_If(self, node):
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cond = self.visit(node.test)
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cond = self.coerce_to_bool(cond)
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head = self.current_block
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if_true = self.add_block()
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@ -838,17 +863,19 @@ class ARTIQIRGenerator(algorithm.Visitor):
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zip(blocks, [(h,t) for (v,h,t) in blocks[1:]] + [(tail, tail)]):
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phi.add_incoming(value, value_tail)
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if next_value_head != tail:
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cond = self.coerce_to_bool(value, block=value_tail)
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if isinstance(node.op, ast.And):
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value_tail.append(ir.BranchIf(value, next_value_head, tail))
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value_tail.append(ir.BranchIf(cond, next_value_head, tail))
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else:
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value_tail.append(ir.BranchIf(value, tail, next_value_head))
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value_tail.append(ir.BranchIf(cond, tail, next_value_head))
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else:
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value_tail.append(ir.Branch(tail))
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return phi
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def visit_UnaryOpT(self, node):
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if isinstance(node.op, ast.Not):
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return self.append(ir.Select(self.visit(node.operand),
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cond = self.coerce_to_bool(self.visit(node.operand))
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return self.append(ir.Select(cond,
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ir.Constant(False, builtins.TBool()),
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ir.Constant(True, builtins.TBool())))
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elif isinstance(node.op, ast.USub):
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@ -1116,9 +1143,7 @@ class ARTIQIRGenerator(algorithm.Visitor):
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return ir.Constant(False, builtins.TBool())
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elif len(node.args) == 1 and len(node.keywords) == 0:
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arg = self.visit(node.args[0])
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return self.append(ir.Select(arg,
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ir.Constant(True, builtins.TBool()),
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ir.Constant(False, builtins.TBool())))
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return self.coerce_to_bool(arg)
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else:
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assert False
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elif types.is_builtin(typ, "int"):
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@ -295,7 +295,7 @@ class LLVMIRGenerator:
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if builtins.get_int_width(typ) > builtins.get_int_width(value_typ):
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return self.llbuilder.sext(self.map(insn.value()), self.llty_of_type(typ),
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name=insn.name)
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else: # builtins.get_int_width(typ) < builtins.get_int_width(value_typ):
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else: # builtins.get_int_width(typ) <= builtins.get_int_width(value_typ):
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return self.llbuilder.trunc(self.map(insn.value()), self.llty_of_type(typ),
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name=insn.name)
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else:
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@ -0,0 +1,5 @@
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# RUN: %python -m artiq.compiler.testbench.module +diag %s >%t
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# RUN: OutputCheck %s --file-to-check=%t
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# CHECK-L: ${LINE:+1}: warning: this expression, which is always truthful, is coerced to bool
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bool(IndexError())
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@ -1,7 +1,5 @@
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# RUN: %python -m artiq.compiler.testbench.jit %s
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assert (not True) == False
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assert (not False) == True
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assert -(-1) == 1
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assert -(-1.0) == 1.0
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assert +1 == 1
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@ -0,0 +1,20 @@
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# RUN: %python -m artiq.compiler.testbench.jit %s
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assert (not 0) == True
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assert (not 1) == False
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assert (0 and 0) is 0
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assert (1 and 0) is 0
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assert (0 and 1) is 0
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assert (1 and 2) is 2
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assert (0 or 0) is 0
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assert (1 or 0) is 1
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assert (0 or 1) is 1
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assert (1 or 2) is 1
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assert bool(False) is False and bool(False) is False
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assert bool(0) is False and bool(1) is True
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assert bool(0.0) is False and bool(1.0) is True
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x = []; assert bool(x) is False; x = [1]; assert bool(x) is True
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assert bool(range(0)) is False and bool(range(1)) is True
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