M-Labs/artiq
2
0
Fork 2
mirror of https://github.com/m-labs/artiq.git synced 2024-12-24 10:54:02 +08:00
Code Issues Projects Releases Wiki Activity

phaser: comment out stpl test

Browse Source
This commit is contained in:
Robert Jördens 2016-10-11 19:50:19 +02:00
parent 2b1cca2e7e
commit bae5b73155
1 changed files with 8 additions and 7 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
artiq/gateware/targets/kc705.py
View File

@ -544,6 +544,7 @@ class Phaser(_NIST_Ions):
# while at 5 GBps, take every second sample... FIXME # while at 5 GBps, take every second sample... FIXME
self.comb += conv.eq(Cat(ch.o[::2])) self.comb += conv.eq(Cat(ch.o[::2]))
if False:
# short transport layer test pattern # short transport layer test pattern
self.comb += [ self.comb += [
self.ad9154.jesd_core.transport.sink.converter0.eq(0x01230123), self.ad9154.jesd_core.transport.sink.converter0.eq(0x01230123),