mirror of https://github.com/m-labs/artiq.git
suservo: use bool for enable
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@ -115,7 +115,7 @@ class SUServo:
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This method does not alter the profile configuration memory
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or the channel controls.
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"""
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self.set_config(enable=0)
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self.set_config(enable=False)
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self.core.delay(3.*us) # pipeline flush
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self.pgia.set_config_mu(
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@ -162,7 +162,7 @@ class SUServo:
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return rtio_input_data(self.channel)
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@kernel
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def set_config(self, enable: int32):
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def set_config(self, enable: bool):
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"""Set SU Servo configuration.
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This method advances the timeline by one servo memory access.
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@ -177,7 +177,7 @@ class SUServo:
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Disabling takes up to two servo cycles (~2.3 µs) to clear the
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processing pipeline.
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"""
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self.write(CONFIG_ADDR, enable)
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self.write(CONFIG_ADDR, int32(enable))
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@kernel
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def get_status(self) -> int32:
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