From b77f6886be2dbfaac7e41ae2044ccbc827ca527c Mon Sep 17 00:00:00 2001 From: Sebastien Bourdeauducq Date: Mon, 6 Jun 2022 22:55:34 +0800 Subject: [PATCH] test_i2c: port to NAC3 --- artiq/test/coredevice/test_i2c.py | 15 ++++++++++++++- 1 file changed, 14 insertions(+), 1 deletion(-) diff --git a/artiq/test/coredevice/test_i2c.py b/artiq/test/coredevice/test_i2c.py index e8293db9d..3282485f0 100644 --- a/artiq/test/coredevice/test_i2c.py +++ b/artiq/test/coredevice/test_i2c.py @@ -3,14 +3,23 @@ import os, unittest from artiq.experiment import * from artiq.test.hardware_testbench import ExperimentCase from artiq.coredevice.exceptions import I2CError +from artiq.coredevice.core import Core from artiq.coredevice.i2c import I2CSwitch, i2c_read_byte +@nac3 class I2CSwitchTest(EnvExperiment): + core: KernelInvariant[Core] + i2c_switch: KernelInvariant[I2CSwitch] + def build(self): self.setattr_device("core") self.setattr_device("i2c_switch") + @rpc + def set_passed(self, passed: bool): + self.set_dataset("passed", passed) + @kernel def run(self): passed = True @@ -20,10 +29,14 @@ class I2CSwitchTest(EnvExperiment): # otherwise we cannot guarantee exact readback values if i2c_read_byte(self.i2c_switch.busno, self.i2c_switch.address) != 1 << i: passed = False - self.set_dataset("passed", passed) + self.set_passed(passed) +@nac3 class NonexistentI2CBus(EnvExperiment): + core: KernelInvariant[Core] + broken_switch: KernelInvariant[I2CSwitch] + def build(self): self.setattr_device("core") self.setattr_device("i2c_switch") # HACK: only run this test on boards with I2C