mirror of https://github.com/m-labs/artiq.git
rtio: fix handling of o_status in DMA
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@ -309,7 +309,7 @@ class CRIMaster(Module, AutoCSR):
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)
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)
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fsm.act("CHECK_STATE",
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fsm.act("CHECK_STATE",
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self.busy.eq(1),
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self.busy.eq(1),
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If(~self.cri.o_status,
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If(self.cri.o_status == 0,
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self.sink.ack.eq(1),
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self.sink.ack.eq(1),
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NextState("IDLE")
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NextState("IDLE")
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),
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),
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