diff --git a/artiq/examples/kasli_basic/device_db_berkeley.py b/artiq/examples/kasli_basic/device_db_berkeley.py
index 87c70e87a..4981ccbcd 100644
--- a/artiq/examples/kasli_basic/device_db_berkeley.py
+++ b/artiq/examples/kasli_basic/device_db_berkeley.py
@@ -5,7 +5,7 @@ device_db = {
         "type": "local",
         "module": "artiq.coredevice.core",
         "class": "Core",
-        "arguments": {"host": core_addr, "ref_period": 1e-9}
+        "arguments": {"host": core_addr, "ref_period": 1.25e-9}
     },
     "core_log": {
         "type": "controller",
@@ -49,9 +49,9 @@ device_db.update({
 })
 
 sync_delay_seeds = [
-    [17, 17, 16, 16],
-    [16, 15, 17, 20],
-    [18, 19, 20, 20],
+    [15, 15, 15, 16],
+    [14, 15, 16, 16],
+    [18, 18, 20, 19],
 ]
 
 io_update_delays = [
@@ -112,7 +112,7 @@ for j in range(3):
                 "spi_device": "spi_urukul{}".format(j),
                 "sync_device": "ttl_urukul{}_sync".format(j),
                 "io_update_device": "ttl_urukul{}_io_update".format(j),
-                "refclk": 125e6,
+                "refclk": 100e6,
                 "clk_sel": 2
             }
         }
@@ -125,6 +125,7 @@ for j in range(3):
             "class": "AD9910",
             "arguments": {
                 "pll_n": 32,
+                "pll_vco": 4,
                 "chip_select": 4 + i,
                 "cpld_device": "urukul{}_cpld".format(j),
                 "sw_device": "ttl_urukul{}_sw{}".format(j, i),
@@ -179,7 +180,7 @@ device_db.update(
         "arguments": {
             "spi_device": "spi_urukul3",
             "io_update_device": "ttl_urukul3_io_update",
-            "refclk": 125e6,
+            "refclk": 100e6,
             "clk_sel": 0
         }
     }
diff --git a/artiq/firmware/runtime/main.rs b/artiq/firmware/runtime/main.rs
index c905d5df4..cc86c2217 100644
--- a/artiq/firmware/runtime/main.rs
+++ b/artiq/firmware/runtime/main.rs
@@ -176,8 +176,8 @@ fn setup_si5324_as_synthesizer()
         bwsel  : 3,
         crystal_ref: true
     };
-    // 100MHz output, from crystal (reference for HMC830)
-    #[cfg(si5324_sayma_ref)]
+    // 100MHz output, from crystal. Also used as reference for Sayma HMC830.
+    #[cfg(any(si5324_sayma_ref, all(rtio_frequency = "100.0", not(si5324_ext_ref))))]
     const SI5324_SETTINGS: board_artiq::si5324::FrequencySettings
         = board_artiq::si5324::FrequencySettings {
         n1_hs  : 9,
diff --git a/artiq/gateware/targets/kasli.py b/artiq/gateware/targets/kasli.py
index 16c27c452..1db7af0e1 100755
--- a/artiq/gateware/targets/kasli.py
+++ b/artiq/gateware/targets/kasli.py
@@ -541,7 +541,7 @@ class Berkeley(_StandaloneBase):
 
         self.config["SI5324_AS_SYNTHESIZER"] = None
         # self.config["SI5324_EXT_REF"] = None
-        self.config["RTIO_FREQUENCY"] = "125.0"
+        self.config["RTIO_FREQUENCY"] = "100.0"
         if hw_rev == "v1.0":
             # EEM clock fan-out from Si5324, not MMCX
             self.comb += self.platform.request("clk_sel").eq(1)