diff --git a/artiq/gateware/targets/kc705_drtio_master.py b/artiq/gateware/targets/kc705_drtio_master.py
index 0da389ff2..e8ea943e7 100755
--- a/artiq/gateware/targets/kc705_drtio_master.py
+++ b/artiq/gateware/targets/kc705_drtio_master.py
@@ -30,7 +30,7 @@ class Master(MiniSoC, AMPSoC):
         "timer_kernel":  0x10000000,
         "rtio":          0x20000000,
         "rtio_dma":      0x30000000,
-        "drtio_aux":     0x60000000,
+        "drtio_aux":     0x50000000,
         "mailbox":       0x70000000
     }
     mem_map.update(MiniSoC.mem_map)
diff --git a/artiq/gateware/targets/kc705_drtio_satellite.py b/artiq/gateware/targets/kc705_drtio_satellite.py
index 942c4939e..00249a4f5 100755
--- a/artiq/gateware/targets/kc705_drtio_satellite.py
+++ b/artiq/gateware/targets/kc705_drtio_satellite.py
@@ -126,7 +126,7 @@ fmc_clock_io = [
 
 class Satellite(BaseSoC):
     mem_map = {
-        "drtio_aux": 0x60000000,
+        "drtio_aux": 0x50000000,
     }
     mem_map.update(BaseSoC.mem_map)