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test: set uart log level to INFO for DMA tests

This commit is contained in:
pca006132 2020-08-13 12:23:32 +08:00
parent 48008eaf5f
commit b05cbcbc24
1 changed files with 12 additions and 0 deletions
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12
artiq/test/coredevice/test_rtio.py
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@ -652,6 +652,18 @@ class _DMA(EnvExperiment):
class DMATest(ExperimentCase): class DMATest(ExperimentCase):
def setUp(self):
super().setUp()
# prevent DEBUG log messages causing delay for DMA
core_addr = self.device_mgr.get_desc("core")["arguments"]["host"]
self.mgmt = CommMgmt(core_addr)
self.mgmt.set_uart_log_level('INFO')
def tearDown(self):
self.mgmt.set_uart_log_level('DEBUG')
self.mgmt.close()
super().tearDown()
def test_dma_storage(self): def test_dma_storage(self):
exp = self.create(_DMA) exp = self.create(_DMA)
exp.record() exp.record()