From b04e15741bce7bc2dff3764039c775a74c7f8384 Mon Sep 17 00:00:00 2001 From: Sebastien Bourdeauducq Date: Fri, 14 Jun 2019 14:03:48 +0800 Subject: [PATCH] drop SI5324_SAYMA_REF --- artiq/firmware/runtime/main.rs | 10 +++++----- artiq/gateware/targets/sayma_amc.py | 1 - 2 files changed, 5 insertions(+), 6 deletions(-) diff --git a/artiq/firmware/runtime/main.rs b/artiq/firmware/runtime/main.rs index 9a9dfce72..32dddc887 100644 --- a/artiq/firmware/runtime/main.rs +++ b/artiq/firmware/runtime/main.rs @@ -138,7 +138,7 @@ fn startup() { fn setup_si5324_as_synthesizer() { // 125MHz output, from 100MHz CLKIN2 reference, 586 Hz loop bandwidth - #[cfg(all(not(si5324_sayma_ref), rtio_frequency = "125.0", si5324_ext_ref, ext_ref_frequency = "100.0"))] + #[cfg(all(rtio_frequency = "125.0", si5324_ext_ref, ext_ref_frequency = "100.0"))] const SI5324_SETTINGS: board_artiq::si5324::FrequencySettings = board_artiq::si5324::FrequencySettings { n1_hs : 10, @@ -151,7 +151,7 @@ fn setup_si5324_as_synthesizer() crystal_ref: false }; // 125MHz output, from 125MHz CLKIN2 reference, 606 Hz loop bandwidth - #[cfg(all(not(si5324_sayma_ref), rtio_frequency = "125.0", si5324_ext_ref, ext_ref_frequency = "125.0"))] + #[cfg(all(rtio_frequency = "125.0", si5324_ext_ref, ext_ref_frequency = "125.0"))] const SI5324_SETTINGS: board_artiq::si5324::FrequencySettings = board_artiq::si5324::FrequencySettings { n1_hs : 5, @@ -164,7 +164,7 @@ fn setup_si5324_as_synthesizer() crystal_ref: false }; // 125MHz output, from crystal, 7 Hz - #[cfg(all(not(si5324_sayma_ref), rtio_frequency = "125.0", not(si5324_ext_ref)))] + #[cfg(all(rtio_frequency = "125.0", not(si5324_ext_ref)))] const SI5324_SETTINGS: board_artiq::si5324::FrequencySettings = board_artiq::si5324::FrequencySettings { n1_hs : 10, @@ -177,7 +177,7 @@ fn setup_si5324_as_synthesizer() crystal_ref: true }; // 150MHz output, from crystal - #[cfg(all(not(si5324_sayma_ref), rtio_frequency = "150.0", not(si5324_ext_ref)))] + #[cfg(all(rtio_frequency = "150.0", not(si5324_ext_ref)))] const SI5324_SETTINGS: board_artiq::si5324::FrequencySettings = board_artiq::si5324::FrequencySettings { n1_hs : 9, @@ -190,7 +190,7 @@ fn setup_si5324_as_synthesizer() crystal_ref: true }; // 100MHz output, from crystal. Also used as reference for Sayma HMC830. - #[cfg(any(si5324_sayma_ref, all(rtio_frequency = "100.0", not(si5324_ext_ref))))] + #[cfg(all(rtio_frequency = "100.0", not(si5324_ext_ref)))] const SI5324_SETTINGS: board_artiq::si5324::FrequencySettings = board_artiq::si5324::FrequencySettings { n1_hs : 9, diff --git a/artiq/gateware/targets/sayma_amc.py b/artiq/gateware/targets/sayma_amc.py index 35cdb5d05..4b020bd24 100755 --- a/artiq/gateware/targets/sayma_amc.py +++ b/artiq/gateware/targets/sayma_amc.py @@ -151,7 +151,6 @@ class MasterDAC(MiniSoC, AMPSoC, RTMCommon): self.config["I2C_BUS_COUNT"] = 1 self.config["HAS_SI5324"] = None self.config["SI5324_AS_SYNTHESIZER"] = None - self.config["SI5324_SAYMA_REF"] = None self.config["RTIO_FREQUENCY"] = str(rtio_clk_freq/1e6) # ensure pins are properly biased and terminated si5324_clkout = platform.request("cdr_clk_clean", 0)