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spi2: reset configuration in rio_phy

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This commit is contained in:
Robert Jördens 2018-03-07 14:23:28 +00:00
parent 7afb23e8be
commit b0282fa855
1 changed files with 1 additions and 1 deletions
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artiq/gateware/rtio/phy/spi2.py
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@ -73,7 +73,7 @@ class SPIMaster(Module):
config.end.reset = 1 config.end.reset = 1
read = Signal() read = Signal()
self.sync.rio += [ self.sync.rio_phy += [
If(self.rtlink.i.stb, If(self.rtlink.i.stb,
read.eq(0) read.eq(0)
), ),