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mirror of https://github.com/m-labs/artiq.git synced 2024-12-25 03:08:27 +08:00

firmware: rename libproto to libproto_artiq.

libproto_artiq only has ARTIQ-specific protocols.
This commit is contained in:
whitequark 2018-05-14 17:58:34 +00:00
parent 02b8426f60
commit ae50196186
17 changed files with 16 additions and 16 deletions

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@ -19,7 +19,7 @@ dependencies = [
"crc 1.7.0 (registry+https://github.com/rust-lang/crates.io-index)",
"io 0.0.0",
"log 0.4.1 (registry+https://github.com/rust-lang/crates.io-index)",
"proto 0.0.0",
"proto_artiq 0.0.0",
]
[[package]]
@ -133,7 +133,7 @@ dependencies = [
"cslice 0.3.0 (registry+https://github.com/rust-lang/crates.io-index)",
"dyld 0.0.0",
"io 0.0.0",
"proto 0.0.0",
"proto_artiq 0.0.0",
]
[[package]]
@ -182,7 +182,7 @@ version = "0.6.1"
source = "registry+https://github.com/rust-lang/crates.io-index"
[[package]]
name = "proto"
name = "proto_artiq"
version = "0.0.0"
dependencies = [
"byteorder 1.2.2 (registry+https://github.com/rust-lang/crates.io-index)",
@ -208,7 +208,7 @@ dependencies = [
"log 0.4.1 (registry+https://github.com/rust-lang/crates.io-index)",
"logger_artiq 0.0.0",
"managed 0.6.1 (registry+https://github.com/rust-lang/crates.io-index)",
"proto 0.0.0",
"proto_artiq 0.0.0",
"smoltcp 0.4.0 (git+https://github.com/m-labs/smoltcp?rev=181083f)",
"std_artiq 0.0.0",
"unwind_backtrace 0.0.0",

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@ -18,4 +18,4 @@ io = { path = "../libio", features = ["byteorder"] }
dyld = { path = "../libdyld" }
board_misoc = { path = "../libboard_misoc" }
board_artiq = { path = "../libboard_artiq" }
proto = { path = "../libproto" }
proto_artiq = { path = "../libproto_artiq" }

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@ -11,7 +11,7 @@ extern crate io;
extern crate dyld;
extern crate board_misoc;
extern crate board_artiq;
extern crate proto;
extern crate proto_artiq;
use core::{mem, ptr, slice, str};
use cslice::{CSlice, AsCSlice};
@ -19,7 +19,7 @@ use io::Cursor;
use dyld::Library;
use board_misoc::csr;
use board_artiq::{mailbox, rpc_queue};
use proto::{kernel_proto, rpc_proto};
use proto_artiq::{kernel_proto, rpc_proto};
use kernel_proto::*;
fn send(request: &Message) {

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@ -19,7 +19,7 @@ crc = { version = "1.7", default-features = false }
log = { version = "0.4", default-features = false }
io = { path = "../libio", features = ["byteorder"] }
board_misoc = { path = "../libboard_misoc" }
proto = { path = "../libproto" }
proto_artiq = { path = "../libproto_artiq" }
[features]
uart_console = []

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@ -5,7 +5,7 @@ use io::{Cursor, Error as IoError};
use io::proto::{ProtoRead, ProtoWrite};
use board_misoc::{csr::DRTIO, mem::DRTIO_AUX, clock};
pub use proto::drtioaux_proto::Packet;
pub use proto_artiq::drtioaux_proto::Packet;
pub type Result<T> = result::Result<T, Error>;

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@ -9,7 +9,7 @@ extern crate crc;
extern crate log;
extern crate io;
extern crate board_misoc;
extern crate proto;
extern crate proto_artiq;
pub mod pcr;

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@ -1,10 +1,10 @@
[package]
authors = ["M-Labs"]
name = "proto"
name = "proto_artiq"
version = "0.0.0"
[lib]
name = "proto"
name = "proto_artiq"
path = "lib.rs"
[dependencies]

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@ -25,7 +25,7 @@ board_misoc = { path = "../libboard_misoc", features = ["uart_console", "smoltcp
std_artiq = { path = "../libstd_artiq", features = ["alloc", "io_error_alloc"] }
logger_artiq = { path = "../liblogger_artiq" }
board_artiq = { path = "../libboard_artiq" }
proto = { path = "../libproto", features = ["log", "alloc"] }
proto_artiq = { path = "../libproto_artiq", features = ["log", "alloc"] }
[dependencies.fringe]
git = "https://github.com/m-labs/libfringe"

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@ -19,7 +19,7 @@ extern crate board_artiq;
#[macro_use]
extern crate std_artiq as std;
extern crate logger_artiq;
extern crate proto;
extern crate proto_artiq;
use core::convert::TryFrom;
use smoltcp::wire::{EthernetAddress, IpAddress, IpCidr};
@ -30,9 +30,9 @@ use board_misoc::ethmac;
#[cfg(has_drtio)]
use board_artiq::drtioaux;
use board_artiq::{mailbox, rpc_queue};
use proto::{mgmt_proto, moninj_proto, rpc_proto, session_proto,kernel_proto};
use proto_artiq::{mgmt_proto, moninj_proto, rpc_proto, session_proto,kernel_proto};
#[cfg(has_rtio_analyzer)]
use proto::analyzer_proto;
use proto_artiq::analyzer_proto;
#[cfg(has_rtio_core)]
mod rtio_mgt;