mirror of https://github.com/m-labs/artiq.git
kasli: integrate grabber
This commit is contained in:
parent
563e434e15
commit
ad099edf63
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@ -144,12 +144,12 @@ device_db.update(
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"type": "local",
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"type": "local",
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"module": "artiq.coredevice.ttl",
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"module": "artiq.coredevice.ttl",
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"class": "TTLOut",
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"class": "TTLOut",
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"arguments": {"channel": 20}
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"arguments": {"channel": 22}
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},
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},
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led1={
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led1={
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"type": "local",
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"type": "local",
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"module": "artiq.coredevice.ttl",
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"module": "artiq.coredevice.ttl",
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"class": "TTLOut",
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"class": "TTLOut",
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"arguments": {"channel": 21}
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"arguments": {"channel": 23}
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},
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},
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)
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)
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@ -178,12 +178,12 @@ device_db.update(
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"type": "local",
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"type": "local",
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"module": "artiq.coredevice.ttl",
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"module": "artiq.coredevice.ttl",
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"class": "TTLOut",
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"class": "TTLOut",
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"arguments": {"channel": 36}
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"arguments": {"channel": 38}
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},
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},
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led1={
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led1={
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"type": "local",
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"type": "local",
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"module": "artiq.coredevice.ttl",
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"module": "artiq.coredevice.ttl",
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"class": "TTLOut",
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"class": "TTLOut",
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"arguments": {"channel": 37}
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"arguments": {"channel": 39}
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}
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}
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)
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)
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@ -339,12 +339,13 @@ class MITLL(_StandaloneBase):
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self.comb += self.platform.request("clk_sel").eq(1)
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self.comb += self.platform.request("clk_sel").eq(1)
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self.rtio_channels = []
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self.rtio_channels = []
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# TODO: grabber on eem0->eemB eem1->eemA
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self.grabber_csr_group = []
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eem.DIO.add_std(self, 4,
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eem.DIO.add_std(self, 4,
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ttl_serdes_7series.InOut_8X, ttl_serdes_7series.InOut_8X)
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ttl_serdes_7series.InOut_8X, ttl_serdes_7series.InOut_8X)
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eem.Urukul.add_std(self, 3, 2, ttl_serdes_7series.Output_8X)
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eem.Urukul.add_std(self, 3, 2, ttl_serdes_7series.Output_8X)
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eem.Zotino.add_std(self, 5, ttl_serdes_7series.Output_8X)
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eem.Zotino.add_std(self, 5, ttl_serdes_7series.Output_8X)
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eem.Zotino.add_std(self, 6, ttl_serdes_7series.Output_8X)
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eem.Zotino.add_std(self, 6, ttl_serdes_7series.Output_8X)
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eem.Grabber.add_std(self, 1, 0)
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for i in (1, 2):
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for i in (1, 2):
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sfp_ctl = self.platform.request("sfp_ctl", i)
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sfp_ctl = self.platform.request("sfp_ctl", i)
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@ -357,6 +358,8 @@ class MITLL(_StandaloneBase):
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self.rtio_channels.append(rtio.LogChannel())
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self.rtio_channels.append(rtio.LogChannel())
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self.add_rtio(self.rtio_channels)
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self.add_rtio(self.rtio_channels)
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self.config["HAS_GRABBER"] = None
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self.add_csr_group("grabber", self.grabber_csr_group)
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class USTC(_StandaloneBase):
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class USTC(_StandaloneBase):
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@ -372,7 +375,7 @@ class USTC(_StandaloneBase):
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self.comb += self.platform.request("clk_sel").eq(1)
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self.comb += self.platform.request("clk_sel").eq(1)
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self.rtio_channels = []
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self.rtio_channels = []
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# TODO: grabber on eem0->eemA
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self.grabber_csr_group = []
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eem.DIO.add_std(self, 5,
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eem.DIO.add_std(self, 5,
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ttl_serdes_7series.InOut_8X, ttl_serdes_7series.Output_8X)
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ttl_serdes_7series.InOut_8X, ttl_serdes_7series.Output_8X)
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eem.DIO.add_std(self, 6,
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eem.DIO.add_std(self, 6,
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@ -381,6 +384,7 @@ class USTC(_StandaloneBase):
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ttl_serdes_7series.Output_8X, ttl_serdes_7series.Output_8X)
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ttl_serdes_7series.Output_8X, ttl_serdes_7series.Output_8X)
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eem.Urukul.add_std(self, 2, 1, ttl_serdes_7series.Output_8X)
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eem.Urukul.add_std(self, 2, 1, ttl_serdes_7series.Output_8X)
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eem.Urukul.add_std(self, 4, 3, ttl_serdes_7series.Output_8X)
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eem.Urukul.add_std(self, 4, 3, ttl_serdes_7series.Output_8X)
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eem.Grabber.add_std(self, 0)
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for i in (1, 2):
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for i in (1, 2):
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sfp_ctl = self.platform.request("sfp_ctl", i)
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sfp_ctl = self.platform.request("sfp_ctl", i)
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@ -393,6 +397,8 @@ class USTC(_StandaloneBase):
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self.rtio_channels.append(rtio.LogChannel())
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self.rtio_channels.append(rtio.LogChannel())
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self.add_rtio(self.rtio_channels)
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self.add_rtio(self.rtio_channels)
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self.config["HAS_GRABBER"] = None
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self.add_csr_group("grabber", self.grabber_csr_group)
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class PTB(_StandaloneBase):
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class PTB(_StandaloneBase):
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@ -502,6 +508,7 @@ class LUH(_StandaloneBase):
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self.comb += self.platform.request("clk_sel").eq(1)
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self.comb += self.platform.request("clk_sel").eq(1)
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self.rtio_channels = []
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self.rtio_channels = []
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self.grabber_csr_group = []
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eem.DIO.add_std(self, 0,
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eem.DIO.add_std(self, 0,
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ttl_serdes_7series.InOut_8X, ttl_serdes_7series.Output_8X)
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ttl_serdes_7series.InOut_8X, ttl_serdes_7series.Output_8X)
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eem.DIO.add_std(self, 1,
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eem.DIO.add_std(self, 1,
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@ -526,6 +533,8 @@ class LUH(_StandaloneBase):
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self.rtio_channels.append(rtio.LogChannel())
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self.rtio_channels.append(rtio.LogChannel())
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self.add_rtio(self.rtio_channels)
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self.add_rtio(self.rtio_channels)
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self.config["HAS_GRABBER"] = None
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self.add_csr_group("grabber", self.grabber_csr_group)
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class Tester(_StandaloneBase):
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class Tester(_StandaloneBase):
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