mirror of https://github.com/m-labs/artiq.git
sed/fifos: use AsyncFIFOBuffered
(D)RTIO now passes timing at 150MHz on Kasli.
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@ -26,7 +26,7 @@ class FIFOs(Module):
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if mode == "sync":
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fifo_cls = SyncFIFOBuffered
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elif mode == "async":
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fifo_cls = AsyncFIFO
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fifo_cls = AsyncFIFOBuffered
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else:
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raise ValueError
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@ -14,8 +14,8 @@ requirements:
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run:
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- python >=3.5.3,<3.6
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- setuptools 33.1.1
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- migen 0.6 py35_11+git78a671d
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- misoc 0.9 py35_1+git2e2b7838
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- migen 0.7 py35_2+git40721b2
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- misoc 0.9 py35_2+git8435d832
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- jesd204b 0.4
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- microscope
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- binutils-or1k-linux >=2.27
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