From aa8e211735594ea087aef4531fbac9c9d5f2d6eb Mon Sep 17 00:00:00 2001 From: Sebastien Bourdeauducq Date: Sat, 22 Oct 2016 13:03:35 +0800 Subject: [PATCH] drtio/rt_packets: fix --- artiq/gateware/drtio/rt_packets.py | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/artiq/gateware/drtio/rt_packets.py b/artiq/gateware/drtio/rt_packets.py index 37570ce3b..a8602d0eb 100644 --- a/artiq/gateware/drtio/rt_packets.py +++ b/artiq/gateware/drtio/rt_packets.py @@ -509,8 +509,8 @@ class RTPacketMaster(Module): rx_fsm = ClockDomainsRenamer("rtio_rx")(FSM(reset_state="INPUT")) self.submodules += rx_fsm - echo_reply_now = Signal() - self.sync.rtio_rx += self.echo_reply_now.eq(echo_reply_now) + echo_received_now = Signal() + self.sync.rtio_rx += self.echo_received_now.eq(echo_received_now) rx_fsm.act("INPUT", If(rx_dp.frame_r, @@ -518,7 +518,7 @@ class RTPacketMaster(Module): If(rx_dp.packet_last, Case(rx_dp.packet_type, { rx_plm.types["error"]: NextState("ERROR"), - rx_plm.types["echo_reply"]: echo_reply_now.eq(1), + rx_plm.types["echo_reply"]: echo_received_now.eq(1), rx_plm.types["fifo_level_reply"]: NextState("FIFO_LEVEL"), "default": [ error_not.eq(1),