diff --git a/artiq/gateware/drtio/rt_packet_satellite.py b/artiq/gateware/drtio/rt_packet_satellite.py
index 02a5a98b1..ef0de8335 100644
--- a/artiq/gateware/drtio/rt_packet_satellite.py
+++ b/artiq/gateware/drtio/rt_packet_satellite.py
@@ -113,7 +113,7 @@ class RTPacketSatellite(Module):
                         rx_plm.types["echo_request"]: echo_req.eq(1),
                         rx_plm.types["set_time"]: NextState("SET_TIME"),
                         rx_plm.types["write"]: NextState("WRITE"),
-                        rx_plm.types["buffer_space_request"]: NextState("BUFFER_SPACE"),
+                        rx_plm.types["buffer_space_request"]: NextState("BUFFER_SPACE_REQUEST"),
                         rx_plm.types["read_request"]: NextState("READ_REQUEST"),
                         "default": self.unknown_packet_type.eq(1)
                     })
@@ -142,10 +142,16 @@ class RTPacketSatellite(Module):
                 )
             )
         )
+        rx_fsm.act("BUFFER_SPACE_REQUEST",
+            self.cri.cmd.eq(cri.commands["get_buffer_space"]),
+            NextState("BUFFER_SPACE")
+        )
         rx_fsm.act("BUFFER_SPACE",
-            buffer_space_set.eq(1),
-            buffer_space_update.eq(1),
-            NextState("INPUT")
+            If(self.cri.o_buffer_space_valid,
+                buffer_space_set.eq(1),
+                buffer_space_update.eq(1),
+                NextState("INPUT")
+            )
         )
 
         rx_fsm.act("READ_REQUEST",
diff --git a/artiq/gateware/rtio/cri.py b/artiq/gateware/rtio/cri.py
index 2a871f736..4a889bc27 100644
--- a/artiq/gateware/rtio/cri.py
+++ b/artiq/gateware/rtio/cri.py
@@ -13,11 +13,13 @@ from misoc.interconnect.csr import *
 
 commands = {
     "nop": 0,
-
     "write": 1,
     # i_status should have the "wait for status" bit set until
     # an event is available, or timestamp is reached.
-    "read": 2
+    "read": 2,
+    # targets must assert o_buffer_space_valid in response
+    # to this command
+    "get_buffer_space": 3
 }
 
 
@@ -32,8 +34,11 @@ layout = [
     # o_status bits:
     # <0:wait> <1:underflow> <2:link error>
     ("o_status", 3, DIR_S_TO_M),
-    # targets may optionally report a pessimistic estimate of the number
-    # of outputs events that can be written without waiting.
+
+    # pessimistic estimate of the number of outputs events that can be
+    # written without waiting.
+    # this feature may be omitted on systems without DRTIO.
+    ("o_buffer_space_valid", 1, DIR_S_TO_M),
     ("o_buffer_space", 16, DIR_S_TO_M),
 
     ("i_data", 32, DIR_S_TO_M),
diff --git a/artiq/gateware/rtio/sed/core.py b/artiq/gateware/rtio/sed/core.py
index ca757e976..7d0b0de4e 100644
--- a/artiq/gateware/rtio/sed/core.py
+++ b/artiq/gateware/rtio/sed/core.py
@@ -55,7 +55,10 @@ class SED(Module):
             self.comb += i.eq(o)
 
         if report_buffer_space:
-            self.comb += self.cri.o_buffer_space.eq(self.fifos.buffer_space)
+            self.comb += [
+                self.cri.o_buffer_space_valid.eq(1),
+                self.cri.o_buffer_space.eq(self.fifos.buffer_space)
+            ]
 
     @property
     def cri(self):