mirror of https://github.com/m-labs/artiq.git
rtio: fix CRI CSRs
This commit is contained in:
parent
9acc7d135e
commit
aa00627c0e
|
@ -116,9 +116,3 @@ class KernelInitiator(Module, AutoCSR):
|
|||
self.o_data.we.eq(self.o_timestamp.re),
|
||||
]
|
||||
self.sync += If(self.counter_update.re, self.counter.status.eq(self.cri.counter))
|
||||
|
||||
def get_csrs(self):
|
||||
return []
|
||||
|
||||
def get_kernel_csrs(self):
|
||||
return AutoCSR.get_csrs(self)
|
||||
|
|
Loading…
Reference in New Issue