From a9d0f253a5b80012517517e7998e661d1b624a1b Mon Sep 17 00:00:00 2001 From: Robert Jordens Date: Wed, 13 Dec 2017 21:21:52 +0800 Subject: [PATCH] sayma_amc: set bitstream and config parameters * slow down CCLK rate as there is additional loading on the signals * single bit SPI for now until we know that quad SPI works * set up https://github.com/m-labs/artiq/issues/847 --- artiq/gateware/targets/sayma_amc_standalone.py | 10 ++++++++-- 1 file changed, 8 insertions(+), 2 deletions(-) diff --git a/artiq/gateware/targets/sayma_amc_standalone.py b/artiq/gateware/targets/sayma_amc_standalone.py index 36947b7ad..a3aef1873 100755 --- a/artiq/gateware/targets/sayma_amc_standalone.py +++ b/artiq/gateware/targets/sayma_amc_standalone.py @@ -120,8 +120,14 @@ class SaymaAMCStandalone(MiniSoC, AMPSoC): **kwargs) AMPSoC.__init__(self) platform = self.platform - platform.toolchain.bitstream_commands.append( - "set_property BITSTREAM.GENERAL.COMPRESS True [current_design]") + platform.toolchain.bitstream_commands.extend([ + "set_property BITSTREAM.GENERAL.COMPRESS True [current_design]", + "set_property BITSTREAM.CONFIG.CONFIGRATE 3 [current_design]", + "set_property BITSTREAM.CONFIG.SPI_BUSWIDTH 1 [current_design]", + "set_property CFGBVS VCCO [current_design]", + "set_property CONFIG_VOLTAGE 3.3 [current_design]", + ]) + self.submodules.leds = gpio.GPIOOut(Cat( platform.request("user_led", 0),