mirror of https://github.com/m-labs/artiq.git
Merge branch 'master' into nk/phaser-servo
This commit is contained in:
GitHub
commit
a8f498b478
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@ -3,50 +3,66 @@
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Release notes
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=============
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Unreleased
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----------
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Highlights:
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* Implemented Phaser-servo. This requires recent gateware on Phaser.
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ARTIQ-7
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-------
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Highlights:
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* New hardware support:
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- Kasli-SoC, a new EEM carrier based on a Zynq SoC, enabling much faster kernel execution.
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- Kasli-SoC, a new EEM carrier based on a Zynq SoC, enabling much faster kernel execution
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(see: https://arxiv.org/abs/2111.15290).
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- DRTIO support on Zynq-based devices (Kasli-SoC and ZC706).
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- DRTIO support on KC705.
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- HVAMP_8CH 8 channel HV amplifier for Fastino / Zotinos
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- Almazny mezzanine board for Mirny
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* TTL device output can be now configured to work as a clock generator.
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- Phaser: improved documentation, exposed the DAC coarse mixer and ``sif_sync``, exposed upconverter calibration
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and enabling/disabling of upconverter LO & RF outputs, added helpers to align Phaser updates to the
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RTIO timeline (``get_next_frame_mu()``
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- Urukul: ``get()``, ``get_mu()``, ``get_att()``, and ``get_att_mu()`` functions added for AD9910 and AD9912.
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* Softcore targets now use the RISC-V architecture (VexRiscv) instead of OR1K (mor1kx).
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* Gateware FPU is supported on KC705 and Kasli 2.0.
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* Faster compilation for large arrays/lists.
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* Phaser:
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- Improved documentation
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- Expose the DAC coarse mixer and ``sif_sync``
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- Exposes upconverter calibration and enabling/disabling of upconverter LO & RF outputs.
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- Add helpers to align Phaser updates to the RTIO timeline (``get_next_frame_mu()``)
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- Implemented Phaser-servo. This requires recent gateware on Phaser.
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* Core device moninj is now proxied via the ``aqctl_moninj_proxy`` controller.
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* Faster exception handling.
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* Several exception handling bugs fixed.
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* Support for a simpler shared library system with faster calls into the runtime. This is only used by the NAC3
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compiler (nac3ld) and improves RTIO output performance (test_pulse_rate) by 9-10%.
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* Moninj improvements:
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- Urukul monitoring and frequency setting (through dashboard) is now supported.
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- Core device moninj is now proxied via the ``aqctl_moninj_proxy`` controller.
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* The configuration entry ``rtio_clock`` supports multiple clocking settings, deprecating the usage
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of compile-time options.
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* Packaging via Nix Flakes.
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* Firmware and gateware can now be built on-demand on the M-Labs server using ``afws_client``
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(subscribers only).
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* Added support for 100MHz RTIO clock in DRTIO.
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* Previously detected RTIO async errors are reported to the host after each kernel terminates and a
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warning is logged. The warning is additional to the one already printed in the core device log
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immediately upon detection of the error.
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* Extended Kasli gateware JSON description with configuration for SPI over DIO.
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* ``get()``, ``get_mu()``, ``get_att()``, and ``get_att_mu()`` functions added for AD9910 and AD9912.
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* TTL outputs can be now configured to work as a clock generator from the JSON.
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* On Kasli, the number of FIFO lanes in the scalable events dispatcher (SED) can now be configured in
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the JSON hardware description file.
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the JSON.
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* ``artiq_ddb_template`` generates edge-counter keys that start with the key of the corresponding
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TTL device (e.g. ``ttl_0_counter`` for the edge counter on TTL device ``ttl_0``).
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* ``artiq_master`` now has an ``--experiment-subdir`` option to scan only a subdirectory of the
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repository when building the list of experiments.
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* Added support for 100MHz RTIO clock in DRTIO.
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* Previously detected RTIO async errors are reported to the host after each kernel terminates and a
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warning is logged. The warning is additional to the one already printed in the core device log upon
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detection of the error.
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* Experiments can now be submitted by-content.
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* The master can now optionally log all experiments submitted into a CSV file.
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* Removed worker DB warning for writing a dataset that is also in the archive.
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* ``PCA9548`` I2C switch class renamed to ``I2CSwitch``, to accomodate support for PCA9547, and
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possibly other switches in future. Readback has been removed, and now only one channel per
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switch is supported.
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* The "ip" config option can now be set to "use_dhcp" in order to use DHCP to obtain an IP address.
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DHCP will also be used if no "ip" config option is set.
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* Urukul monitoring and frequency setting (through dashboard) is now supported.
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* Experiments can now call ``scheduler.check_termination()`` to test if the user
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has requested graceful termination.
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* ARTIQ command-line programs and controllers now exit cleanly on Ctrl-C.
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* ``artiq_coremgmt reboot`` now reloads gateware as well, providing a more thorough and reliable
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device reset (7-series FPGAs only).
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* Firmware and gateware can now be built on-demand on the M-Labs server using ``afws_client``
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(subscribers only). Self-compilation remains possible.
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* Easier-to-use packaging via Nix Flakes.
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* Python 3.10 support (experimental).
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Breaking changes:
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@ -61,6 +77,10 @@ Breaking changes:
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* Mirny: Added extra delays in ``ADF5356.sync()``. This avoids the need of an extra delay before
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calling `ADF5356.init()`.
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* The deprecated ``set_dataset(..., save=...)`` is no longer supported.
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* The ``PCA9548`` I2C switch class was renamed to ``I2CSwitch``, to accomodate support for PCA9547,
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and possibly other switches in future. Readback has been removed, and now only one channel per
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switch is supported.
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ARTIQ-6
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-------
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18
flake.lock
18
flake.lock
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@ -26,11 +26,11 @@
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"mozilla-overlay": {
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"flake": false,
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"locked": {
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"lastModified": 1650459918,
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"narHash": "sha256-sroCK+QJTmoXtcRkwZyKOP9iAYOPID2Bwdxn4GkG16w=",
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"lastModified": 1657214286,
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"narHash": "sha256-rO/4oymKXU09wG2bcTt4uthPCp1XsBZjxuCJo3yVXNs=",
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"owner": "mozilla",
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"repo": "nixpkgs-mozilla",
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"rev": "e1f7540fc0a8b989fb8cf701dc4fd7fc76bcf168",
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"rev": "0508a66e28a5792fdfb126bbf4dec1029c2509e0",
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"type": "github"
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},
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"original": {
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@ -41,11 +41,11 @@
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},
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"nixpkgs": {
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"locked": {
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"lastModified": 1655278232,
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"narHash": "sha256-H6s7tnHYiDKFCcLADS4sl1sUq0dDJuRQXCieguk/6SA=",
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"lastModified": 1657123678,
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"narHash": "sha256-cowVkScfUPlbBXUp08MeVk/wgm9E1zp1uC+9no2hZYw=",
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"owner": "NixOS",
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"repo": "nixpkgs",
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"rev": "8b538fcb329a7bc3d153962f17c509ee49166973",
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"rev": "316b762afdb9e142a803f29c49a88b4a47db80ee",
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"type": "github"
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},
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"original": {
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@ -89,11 +89,11 @@
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"src-migen": {
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"flake": false,
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"locked": {
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"lastModified": 1650337393,
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"narHash": "sha256-rm1SlFmF2ASz0vIy2nDEzGlyRw2oYNeJRr8Kh8Mg2Qc=",
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"lastModified": 1656649178,
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"narHash": "sha256-A91sZRrprEuPOtIUVxm6wX5djac9wnNZQ4+cU1nvJPc=",
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"owner": "m-labs",
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"repo": "migen",
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"rev": "d4e3f34177c32f09904397179e6ed9c83175e528",
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"rev": "0fb91737090fe45fd764ea3f71257a4c53c7a4ae",
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"type": "github"
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},
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"original": {
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12
flake.nix
12
flake.nix
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@ -16,8 +16,9 @@
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outputs = { self, nixpkgs, mozilla-overlay, sipyco, src-pythonparser, artiq-comtools, src-migen, src-misoc }:
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let
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pkgs = import nixpkgs { system = "x86_64-linux"; overlays = [ (import mozilla-overlay) ]; };
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pkgs-aarch64 = import nixpkgs { system = "aarch64-linux"; };
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artiqVersionMajor = 7;
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artiqVersionMajor = 8;
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artiqVersionMinor = self.sourceInfo.revCount or 0;
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artiqVersionId = self.sourceInfo.shortRev or "unknown";
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artiqVersion = (builtins.toString artiqVersionMajor) + "." + (builtins.toString artiqVersionMinor) + "." + artiqVersionId + ".beta";
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@ -305,7 +306,7 @@
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dontFixup = true;
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};
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openocd-bscanspi = let
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openocd-bscanspi-f = pkgs: let
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bscan_spi_bitstreams-pkg = pkgs.stdenv.mkDerivation {
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name = "bscan_spi_bitstreams";
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src = pkgs.fetchFromGitHub {
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@ -362,8 +363,9 @@
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};
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in rec {
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packages.x86_64-linux = {
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inherit pythonparser qasync openocd-bscanspi artiq;
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inherit pythonparser qasync artiq;
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inherit migen misoc asyncserial microscope vivadoEnv vivado;
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openocd-bscanspi = openocd-bscanspi-f pkgs;
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artiq-board-kc705-nist_clock = makeArtiqBoardPackage {
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target = "kc705";
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variant = "nist_clock";
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@ -443,6 +445,10 @@
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'';
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};
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packages.aarch64-linux = {
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openocd-bscanspi = openocd-bscanspi-f pkgs-aarch64;
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};
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hydraJobs = {
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inherit (packages.x86_64-linux) artiq artiq-board-kc705-nist_clock openocd-bscanspi;
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kc705-hitl = pkgs.stdenv.mkDerivation {
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