M-Labs
/
artiq
mirror of https://github.com/m-labs/artiq.git
2
0
Fork 2
Code Issues Projects Releases Wiki Activity

ad99xx added additional kernel invariants 

Signed-off-by: Leon Riesebos <leon.riesebos@duke.edu>
This commit is contained in:
Leon Riesebos 2021-04-20 22:30:21 -04:00 committed by Sebastien Bourdeauducq
parent b5333d7105
commit a5650290bd
2 changed files with 6 additions and 4 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

6
artiq/coredevice/ad9910.py
View File

@ -137,8 +137,10 @@ class AD9910:
def __init__(self, dmgr, chip_select, cpld_device, sw_device=None,
pll_n=40, pll_cp=7, pll_vco=5, sync_delay_seed=-1,
io_update_delay=0, pll_en=1):
self.kernel_invariants = {"chip_select", "cpld", "core", "bus",
"ftw_per_hz", "sysclk_per_mu"}
self.kernel_invariants = {"cpld", "core", "bus", "chip_select",
"pll_en", "pll_n", "pll_vco", "pll_cp",
"ftw_per_hz", "sysclk_per_mu", "sysclk",
"sync_data"}
self.cpld = dmgr.get(cpld_device)
self.core = self.cpld.core
self.bus = self.cpld.bus

4
artiq/coredevice/ad9912.py
View File

@ -28,8 +28,8 @@ class AD9912:
def __init__(self, dmgr, chip_select, cpld_device, sw_device=None,
pll_n=10):
self.kernel_invariants = {"chip_select", "cpld", "core", "bus",
"ftw_per_hz"}
self.kernel_invariants = {"cpld", "core", "bus", "chip_select",
"pll_n", "ftw_per_hz"}
self.cpld = dmgr.get(cpld_device)
self.core = self.cpld.core
self.bus = self.cpld.bus