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dma: tentative port to NAC3
will not work due to missing context manager and possibly memory management issues
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@ -5,34 +5,36 @@ the core device's SDRAM, and playing them back at higher speeds than the CPU
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alone could achieve.
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"""
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from artiq.language.core import syscall, kernel
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from artiq.language.types import TInt32, TInt64, TStr, TNone, TTuple
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from numpy import int32, int64
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from artiq.language.core import nac3, extern, kernel, Kernel, KernelInvariant
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from artiq.coredevice.exceptions import DMAError
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from numpy import int64
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from artiq.coredevice.core import Core
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@syscall
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def dma_record_start(name: TStr) -> TNone:
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@extern
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def dma_record_start(name: str):
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raise NotImplementedError("syscall not simulated")
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@syscall
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def dma_record_stop(duration: TInt64) -> TNone:
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@extern
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def dma_record_stop(duration: int64):
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raise NotImplementedError("syscall not simulated")
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@syscall
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def dma_erase(name: TStr) -> TNone:
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@extern
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def dma_erase(name: str):
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raise NotImplementedError("syscall not simulated")
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@syscall
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def dma_retrieve(name: TStr) -> TTuple([TInt64, TInt32]):
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@extern
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def dma_retrieve(name: str) -> tuple[int64, int32]:
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raise NotImplementedError("syscall not simulated")
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@syscall
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def dma_playback(timestamp: TInt64, ptr: TInt32) -> TNone:
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@extern
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def dma_playback(timestamp: int64, ptr: int32):
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raise NotImplementedError("syscall not simulated")
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@nac3
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class DMARecordContextManager:
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"""Context manager returned by :meth:`CoreDMA.record()`.
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@ -44,6 +46,9 @@ class DMARecordContextManager:
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are stored in a newly created trace, and ``now`` is restored to the value
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it had before the context manager was entered.
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"""
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name: Kernel[str]
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saved_now_mu: Kernel[int64]
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def __init__(self):
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self.name = ""
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self.saved_now_mu = int64(0)
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@ -52,21 +57,24 @@ class DMARecordContextManager:
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def __enter__(self):
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dma_record_start(self.name) # this may raise, so do it before altering now
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self.saved_now_mu = now_mu()
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at_mu(0)
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at_mu(int64(0))
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@kernel
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def __exit__(self, type, value, traceback):
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def __exit__(self):
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dma_record_stop(now_mu()) # see above
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at_mu(self.saved_now_mu)
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@nac3
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class CoreDMA:
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"""Core device Direct Memory Access (DMA) driver.
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Gives access to the DMA functionality of the core device.
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"""
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kernel_invariants = {"core", "recorder"}
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core: KernelInvariant[Core]
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recorder: KernelInvariant[DMARecordContextManager]
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epoch: Kernel[int32]
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def __init__(self, dmgr, core_device="core"):
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self.core = dmgr.get(core_device)
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@ -74,7 +82,7 @@ class CoreDMA:
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self.epoch = 0
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@kernel
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def record(self, name):
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def record(self, name: str) -> DMARecordContextManager:
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"""Returns a context manager that will record a DMA trace called ``name``.
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Any previously recorded trace with the same name is overwritten.
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The trace will persist across kernel switches."""
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@ -83,13 +91,13 @@ class CoreDMA:
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return self.recorder
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@kernel
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def erase(self, name):
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def erase(self, name: str):
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"""Removes the DMA trace with the given name from storage."""
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self.epoch += 1
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dma_erase(name)
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@kernel
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def playback(self, name):
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def playback(self, name: str):
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"""Replays a previously recorded DMA trace. This function blocks until
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the entire trace is submitted to the RTIO FIFOs."""
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(advance_mu, ptr) = dma_retrieve(name)
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@ -97,14 +105,14 @@ class CoreDMA:
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delay_mu(advance_mu)
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@kernel
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def get_handle(self, name):
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def get_handle(self, name: str) -> tuple[int32, int64, int32]:
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"""Returns a handle to a previously recorded DMA trace. The returned handle
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is only valid until the next call to :meth:`record` or :meth:`erase`."""
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(advance_mu, ptr) = dma_retrieve(name)
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return (self.epoch, advance_mu, ptr)
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@kernel
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def playback_handle(self, handle):
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def playback_handle(self, handle: tuple[int32, int64, int32]):
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"""Replays a handle obtained with :meth:`get_handle`. Using this function
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is much faster than :meth:`playback` for replaying a set of traces repeatedly,
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but incurs the overhead of managing the handles onto the programmer."""
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