M-Labs/artiq
2
0
Fork 2
mirror of https://github.com/m-labs/artiq.git synced 2024-12-25 11:18:27 +08:00
Code Issues Projects Releases Wiki Activity

sayma_amc: use more selective IOBUFDS false path

Browse Source
This commit is contained in:
Sebastien Bourdeauducq 2019-01-19 11:47:50 +08:00
parent 40187d1957
commit a2ff2cc173
1 changed files with 2 additions and 2 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
artiq/gateware/targets/sayma_amc.py
View File

@ -406,9 +406,9 @@ def workaround_us_lvds_tristate(platform):
# timing analysis. Disable the latter for IOBUFDS.
# See:
# https://forums.xilinx.com/t5/Timing-Analysis/Delay-890-ns-in-OBUFTDS-in-Kintex-UltraScale/td-p/868364
# FIXME: this is a bit zealous. Xilinx SR in progress to find a more selective command.
platform.add_platform_command(
"set_false_path -through [get_pins -filter {{REF_PIN_NAME == O}} -of [get_cells -filter {{REF_NAME == IOBUFDS}}]]")
"set_false_path -through [get_pins -filter {{REF_PIN_NAME == T}} -of [get_cells -filter {{REF_NAME == IOBUFDS}}]]"
" -through [get_pins -filter {{REF_PIN_NAME == O}} -of [get_cells -filter {{REF_NAME == IOBUFDS}}]]")
class Master(MiniSoC, AMPSoC):