mirror of https://github.com/m-labs/artiq.git
transforms/remove_inter_assigns: fix handling of try blocks
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@ -79,7 +79,20 @@ class _InterAssignRemover(ast.NodeTransformer):
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def visit_Try(self, node):
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prev_modified_names = self.modified_names_push()
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self.generic_visit(node)
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node.body = [self.visit(stmt) for stmt in node.body]
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self.modified_names_pop(prev_modified_names)
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prev_modified_names = self.modified_names_push()
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prev_replacements = self.replacements
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for handler in node.handlers:
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self.replacements = copy(prev_replacements)
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handler.body = [self.visit(stmt) for stmt in handler.body]
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self.replacements = copy(prev_replacements)
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node.orelse = [self.visit(stmt) for stmt in node.orelse]
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self.modified_names_pop(prev_modified_names)
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prev_modified_names = self.modified_names_push()
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node.finalbody = [self.visit(stmt) for stmt in node.finalbody]
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self.modified_names_pop(prev_modified_names)
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return node
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