mirror of https://github.com/m-labs/artiq.git
Revert "sayma: set up Si5324 for RGMII clock rerouting"
This reverts commit 2b01aa22b6
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This commit is contained in:
parent
701308474f
commit
a23251276d
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@ -82,8 +82,6 @@ fn startup() {
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#[cfg(has_ad9154)]
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#[cfg(has_ad9154)]
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board::ad9154::init().expect("cannot initialize AD9154");
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board::ad9154::init().expect("cannot initialize AD9154");
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#[cfg(rgmii_clock_rerouted)]
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setup_rgmii_si5324();
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#[cfg(has_ethmac)]
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#[cfg(has_ethmac)]
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startup_ethernet();
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startup_ethernet();
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#[cfg(not(has_ethmac))]
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#[cfg(not(has_ethmac))]
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@ -93,27 +91,6 @@ fn startup() {
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}
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}
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}
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}
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#[cfg(rgmii_clock_rerouted)]
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fn setup_rgmii_si5324()
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{
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const SI5324_SETTINGS: board::si5324::FrequencySettings
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= board::si5324::FrequencySettings {
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n1_hs : 5,
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nc1_ls : 8,
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n2_hs : 7,
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n2_ls : 360,
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n31 : 63,
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n32 : 63,
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bwsel : 4
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};
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info!("rerouting RGMII clock through Si5324");
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unsafe { board::csr::ethphy::crg_reset_write(1); }
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board::i2c::init();
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board::si5324::setup(&SI5324_SETTINGS).expect("cannot initialize Si5324");
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board::si5324::select_ext_input(true).expect("failed to select Si5324 input");
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unsafe { board::csr::ethphy::crg_reset_write(0); }
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}
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#[cfg(has_ethmac)]
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#[cfg(has_ethmac)]
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fn startup_ethernet() {
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fn startup_ethernet() {
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let hardware_addr;
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let hardware_addr;
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@ -140,15 +140,6 @@ class SaymaAMCStandalone(MiniSoC, AMPSoC):
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serial_rtm.tx.eq(serial_1.rx)
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serial_rtm.tx.eq(serial_1.rx)
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]
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]
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# Si5324 used to work around RGMII clock routing issue on first PCB revision
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self.submodules.si5324_rst_n = gpio.GPIOOut(platform.request("si5324").rst_n)
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self.csr_devices.append("si5324_rst_n")
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i2c = self.platform.request("i2c")
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self.submodules.i2c = gpio.GPIOTristate([i2c.scl, i2c.sda])
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self.csr_devices.append("i2c")
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self.config["I2C_BUS_COUNT"] = 1
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self.config["HAS_SI5324"] = None
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# AMC/RTM serwb
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# AMC/RTM serwb
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serwb_pll = serwb.phy.SERWBPLL(125e6, 1.25e9, vco_div=2)
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serwb_pll = serwb.phy.SERWBPLL(125e6, 1.25e9, vco_div=2)
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self.comb += serwb_pll.refclk.eq(self.crg.cd_sys.clk)
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self.comb += serwb_pll.refclk.eq(self.crg.cd_sys.clk)
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