liboard_artiq/hmc830_7043: allow sysref digital/analog delay configuration (will need to be adjusted for jesd subclass1)

artiq/firmware/libboard_artiq/hmc830_7043.rs

@@ -170,9 +170,15 @@ mod hmc7043 {
             info!("HMC7043 found");
         }
         info!("HMC7043 configuration...");
+         /* global configuration */
         for &(addr, data) in HMC7043_WRITES.iter() {
             write(addr, data);
         }
+        /* sysref digital coarse delay configuration (18 steps, 1/2VCO cycle/step)*/
+        write(0x112, 0x0);
+        /* sysref analog fine delay configuration (24 steps, 25ps/step)*/
+        write(0x111, 0x0);
+
         Ok(())
     }
 }